Interposer

{{Short description|Layer between an integrated circuit and a printed circuit board}} [[File:BGA Package Sideview.svg|thumb|BGA with an interposer between the integrated circuit die to ball grid array]] [[File:Intel Pentium II die-to-BGA-interposter.png|thumb|Pentium II: example of an interposer in dark yellow, integrated circuit die to ball grid array chip carrier]]

An '''interposer''' is an electrical interface routing between one socket or connection and another. The purpose of an interposer is to spread a connection to a wider pitch or to reroute a connection to a different connection.<ref name="sub">[http://www.siliconfareast.com/substrates.htm Package Substrates/Interposers].</ref>

An interposer can be made of either silicon or organic (printed circuit board-like) material.<ref>{{cite web | url=https://www.anandtech.com/show/21405/tsmc-to-expand-cowos-capacity-by-60-every-year-through-2026 | archive-url=https://web.archive.org/web/20240521184253/https://www.anandtech.com/show/21405/tsmc-to-expand-cowos-capacity-by-60-every-year-through-2026 | url-status=dead | archive-date=May 21, 2024 | title=TSMC to Expand CoWoS Capacity by 60% Yearly Through 2026 }}</ref><ref>{{cite web | url=https://semiwiki.com/semiconductor-manufacturers/tsmc/299955-highlights-of-the-tsmc-technology-symposium-2021-packaging/ | title=Highlights of the TSMC Technology Symposium 2021 – Packaging }}</ref>

Interposer comes from the Latin word {{lang|la|interpōnere}}, meaning "to put between".<ref name="def">[http://www.thefreedictionary.com/interposes interposes - definition of interposes by the Free Online Dictionary, Thesaurus and Encyclopedia].</ref> They are often used in BGA packages, multi-chip modules and high-bandwidth memory.<ref>{{Cite web |url=https://semiengineering.com/knowledge_centers/packaging/advanced-packaging/2-5d-ic/ |title = 2.5D}}</ref>

A common example of an interposer is an integrated circuit die to BGA, such as in the Pentium II. This is done through various substrates, both rigid and flexible, most commonly FR4 for rigid, and polyimide for flexible.<ref name="sub" /> Silicon and glass are also evaluated as an integration method.<ref>[http://electroiq.com/blog/2011/06/silicon-interposers-building-blocks-for-3d-ics/ Silicon interposers: building blocks for 3D-ICs] ({{Webarchive|url=https://web.archive.org/web/20180130094258/http://electroiq.com/blog/2011/06/silicon-interposers-building-blocks-for-3d-ics/ |date=2018-01-30 }}) / ElectroIQ, 2011.</ref><ref>[http://www.prc.gatech.edu/Articles/25D%20Interposers-Organics%20vs%20Silicon%20vs%20Glass%20-%20R%20Tummala%20-%20GA-Tech.pdf 2.5D Interposers; Organics vs. Silicon vs. Glass] ({{Webarchive|url=https://web.archive.org/web/20151010214219/http://www.prc.gatech.edu/Articles/25D%20Interposers-Organics%20vs%20Silicon%20vs%20Glass%20-%20R%20Tummala%20-%20GA-Tech.pdf |date=2015-10-10 }}) / Rao R. Tummala, ChipScaleReview, Volume 13, Number 4, July–August 2013, pages 18–19.</ref> Interposer stacks are also a widely accepted, cost-effective alternative to 3D ICs.<ref>{{Cite book |last=Lau |first=John H. |date=2011-01-01 |chapter=The Most Cost-Effective Integrator (TSV Interposer) for 3D IC Integration System-in-Package (SiP) |pages=53–63 |doi=10.1115/ipack2011-52189 |title=ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 1 |isbn=978-0-7918-4461-8}}</ref><ref>{{Cite news |url=https://www.3dincites.com/2013/05/semicon-singapore-3d-ic-wrap-up-bring-down-the-cost-and-bring-out-the-tsv-alternatives/ |title=SEMICON Singapore 3D IC Wrap-Up: Bring down the cost and bring out the TSV alternatives |date=2013-05-22 |work=3D InCites |access-date=2017-08-21 |language=en-US}}</ref> There are already several products with interposer technology in the market, notably the AMD Fiji/Fury GPU,<ref>{{Cite news |url=http://www.anandtech.com/print/9390/the-amd-radeon-%20r9-fury-x-review |archive-url=https://web.archive.org/web/20220323225840/https://www.anandtech.com/print/9390/the-amd-radeon-%20r9-fury-x-review |url-status=dead |archive-date=March 23, 2022 |title=The AMD Radeon R9 Fury X Review: Aiming For the Top |access-date=2017-08-17}}</ref> and the Xilinx Virtex-7 FPGA.<ref>{{Cite web |url=https://www.xilinx.com/support/documentation/white_papers/wp380_Stacked_Silicon_Interconnect_Technology.pdf |title=White Paper: Virtex-7 FPGAs}}</ref> In 2016, CEA Leti demonstrated their second-generation 3D-NoC technology, which combines small dies ("chiplets"), fabricated at the FDSOI 28 nm node, on a 65 nm CMOS interposer.<ref>{{Cite web |url=http://www.eetimes.com/document.asp?doc_id=1330129 |archive-url=https://web.archive.org/web/20160715161537/http://www.eetimes.com/document.asp?doc_id=1330129 |archive-date=2016-07-15 |title=Leti Unveils New 3D Network-on-Chip |website=EE Times |access-date=2017-08-17}}</ref>

Another example of an interposer is the adapter used to plug a SATA drive into a SAS backplane with redundant ports. While SAS drives have two ports that can be used to connect to redundant paths or storage controllers, SATA drives only have a single port. Directly, they can only connect to a single controller or path. SATA drives can be connected to nearly all SAS backplanes without adapters, but using an interposer with a port-switching logic allows providing path redundancy.<ref>{{cite web | url = http://www.snia.org/sites/default/education/tutorials/2007/fall/storage/WillisWhittington_Deltas_by_Design.pdf | title = Desktop, Nearline & Enterprise Disk Drives | year = 2007 | accessdate = 2014-09-22 | author = Willis Whittington | publisher = Storage Networking Industry Association (SNIA) | page = 17 | archive-date = 2024-10-02 | archive-url = https://web.archive.org/web/20241002054004/https://www.snia.org/sites/default/education/tutorials/2007/fall/storage/WillisWhittington_Deltas_by_Design.pdf | url-status = dead }}</ref>

== References == {{Reflist}}

Category:Integrated circuits