{{short description|Printed circuit board feature}} {{use dmy dates|date=January 2022|cs1-dates=y}} {{use list-defined references|date=January 2022}}
thumb|220px|Teardrops and trace necking as seen in a PCB layout design tool {{multiple image | total_width = 230 | direction = vertical | image1 = HDDDetail (Art).jpg | image2 = Sony-CCD-TRV24E sensor 343f.JPG | footer = Teardrop vias on printed circuit boards }}
A '''teardrop''' is typically drop-shaped feature on a printed circuit board (PCB) and can be found on the junction of vias or contact pads.
==Purpose== The main purpose of teardrops is to enhance structural integrity in presence of thermal or mechanical stresses,<ref name="EDN_2014">{{cite web |title=Component placement tips and strategies |author-first=Mahmoud |author-last=Wahby |date=2014-02-21 |publisher=EDN Network |url=http://www.edn.com/design/pc-board/4428665/2/Component-placement-tips-and-strategies |access-date=2017-09-24 |url-status=live |archive-url=https://web.archive.org/web/20170924154358/http://www.edn.com/design/pc-board/4428665/2/Component-placement-tips-and-strategies |archive-date=2017-09-24}}</ref><ref name="Altium_2017_Teardrops">{{cite web |title=Removing Unused Pads and Adding Teardrops |work=Altium Designer technical documentation |publisher=Altium |date=2017-05-30 |author-first=Phil |author-last=Loughhead |url=http://www.altium.com/documentation/17.1/display/ADES/((Removing+Unused+Pads+and+Adding+Teardrops))_AD |access-date=2017-09-24 |url-status=live |archive-url=https://web.archive.org/web/20170924154600/http://www.altium.com/documentation/17.1/display/ADES/((Removing+Unused+Pads+and+Adding+Teardrops))_AD |archive-date=2017-09-24}}</ref><ref name="Kaizen_2010">{{cite web |title=Why Where When and how teardrops should be added to PCB? |author-first=Amos |author-last=Kolath |date=2010 |publisher=KaiZen Technologies |url=http://www.kaizen-t.com/technical/teardropinpcb.html |access-date=2017-09-24 |url-status=live |archive-url=https://web.archive.org/web/20170924160524/http://www.kaizen-t.com/technical/teardropinpcb.html |archive-date=2017-09-24}}</ref> for example due to vibration or flexing.<ref>{{Cite web |last=Ruth |date=2023-04-28 |title=Introduction to high speed PCB and is it same as high frequency PCB |url=https://www.pcbaaa.com/an-ultimate-introduction-to-high-speed-pcb-and-is-it-same-as-high-frequency-pcb/ |access-date=2023-05-01 |publisher=IBE Electronics}}</ref> Structural integrity may be compromised, e.g., by misalignment during drilling, so that too much copper may be removed by the drill hole in the area where a trace connects to the pad or via.<ref name="Altium_2017_Teardrops"/><ref name="Kaizen_2010"/><ref name="Lobner_2002"/> An extra advantage is the enlarging of manufacturing tolerances, making manufacturing easier and cheaper.<ref name="Kaizen_2010"/>
==Shape== {{anchor|Filleting|Straight|Concave|Snowman}} While a typical shape of a teardrop is straight-line tapering, they may be concave.<ref name="Altium_2017_Teardrops"/> This type of teardrop is also called ''filleting'' or ''straight''.<ref name="Kaizen_2010"/> To produce a ''snowman''-shaped teardrop, a secondary pad of smaller size is added at the junction overlapping with the primary pad (hence the nickname).<ref name="Kaizen_2010"/><ref name="TI_2010"/>
==Necking== {{See also|Necking (engineering)}} For similar reasons, a technique called ''trace necking'' reduces (or ''necks down''<ref name="Altium_2017_Necking"/><ref name="Byers_1991"/><ref name="Whitaker_2005"/>) the width of a trace that approaches a narrower pad of a surface-mounted device or a through-hole with a diameter that is less than the width of the trace, or when the trace passes through bottlenecks (for example, between the pads of a component).<ref name="Byers_1991"/><ref name="Whitaker_2005"/><ref name="Abrams_1966"/><ref name="Thieraus_2004"/> {{-}} ==References== <references>
<ref name="TI_2010">{{cite web |title=PCB Design Guidelines for 0.5mm Package-on-Package Applications Processor, Part I |author-first1=Keith G. |author-last1=Gutierrez |author-first2=Keven |author-last2=Coates |publisher=Texas Instruments |id=Application Report SPRABB3 |date=June 2010 |url=http://www.ti.com/lit/an/sprabb3/sprabb3.pdf |access-date=2015-07-27 |url-status=live |archive-url=https://web.archive.org/web/20170924161459/http://www.ti.com/lit/an/sprabb3/sprabb3.pdf |archive-date=2017-09-24}}</ref><ref name="Lobner_2002">{{cite web |title=Empfehlung zu Tear-drops |trans-title=Recommendations for tear-drops |author-first=Wilhelm |author-last=Lobner |language=German |publisher=AT&S AG |date=October 2002 |url=http://wiki.fed.de/images/5/50/Empfehlung_zu_Tear-drops.pdf |access-date=2017-09-24 |url-status=live |archive-url=https://web.archive.org/web/20170924171544/http://wiki.fed.de/images/5/50/Empfehlung_zu_Tear-drops.pdf |archive-date=2017-09-24}}</ref> <ref name="Altium_2017_Necking">{{cite web |title=Interactive Routing |work=Altium Designer technical documentation |publisher=Altium |date=2017-04-25 |author-first=Phil |author-last=Loughhead |url=http://www.altium.com/documentation/17.1/display/ADES/((Interactive+Routing))_AD |access-date=2017-09-24 |url-status=live |archive-url=https://web.archive.org/web/20170924200151/http://www.altium.com/documentation/17.1/display/ADES/((Interactive+Routing))_AD |archive-date=2017-09-24}}</ref> <ref name="Abrams_1966">{{cite patent |title=Packaging Electronic Systems |country=US|number=3560256 |pubdate=1971-02-02 |fdate=1966-10-06 |pridate=1966-10-06 |inventor-first=Halle |inventor-last=Abrams |assign=Western Electric Co.}}</ref> <ref name="Byers_1991">{{cite book |title=Printed Circuit Board Design with Microcomputers |author-first=T. J. |author-last=Byers |edition=1 |publisher=McGraw-Hill Book Company |date=1991-08-01 |isbn=0070095582 |lccn=91-72187 |page=102 |url=https://dl.acm.org/citation.cfm?id=114661}}</ref><ref name="Whitaker_2005">{{cite book |title=The Electronics Handbook |editor-first1=Jerry C. |editor-last1=Whitaker |editor-first2=Richard C. |editor-last2=Dorf |author-first1=Ravindranath |author-last1=Kollipara |author-first2=Vijai K. |author-last2=Tripathi |author-first3=Jerry E. |author-last3=Sergent |author-first4=Glenn R. |author-last4=Blackwell |author-first5=Donald |author-last5=White |author-first6=Zbigniew J. |author-last6=Staszak |chapter=11.1.3 Packaging Electronic Systems - Design of Printed Wiring Boards |publisher=CRC Press |date=2005 |edition=2 |isbn=978-0-8493-1889-4 |lccn=2004057106 |page=1266 |chapter-url=http://s1.downloadmienphi.net/file/downloadfile6/192/1385077.pdf |access-date=2017-09-25 |url-status=live |archive-url=https://web.archive.org/web/20170925235855/http://s1.downloadmienphi.net/file/downloadfile6/192/1385077.pdf |archive-date=2017-09-25}}</ref> <ref name="Thieraus_2004">{{cite book |title=High-Speed Circuit Board Signal Integrity |author-first=Stephen C. |author-last=Thierauf |publisher=Artech House, Inc. |date=2004 |edition=1 |isbn=1580531318 |pages=104–105}}</ref>
</references>
==External links== {{commonscat}} *[https://www.fastlink-electronics.com/products/high-frequency-pcb-hfp/ High Frequency PCB] *[https://www.topfastpcb.com/ Precision PCB Solutions]
Category:Printed circuit board manufacturing