'''PicoBlaze''' is the designation of a series of three free soft processor cores from Xilinx for use in their FPGA and CPLD products. They are based on an 8-bit RISC architecture and can reach speeds up to 100 MIPS on the Virtex 4 FPGA's family. The processors have an 8-bit address and data port for access to a wide range of peripherals. The license of the cores allows their free use, albeit only on Xilinx devices, and they come with development tools. Third-party tools are available from Mediatronix and others. Also PacoBlaze, a behavioral and device independent implementation of the cores exists and is released under the BSD License. The PauloBlaze is an open source VHDL implementation under the Apache License.

The PicoBlaze design was originally named KCPSM which stands for "Constant(K) Coded Programmable State Machine" (formerly "Ken Chapman's PSM"). Ken Chapman was the Xilinx systems designer who devised and implemented the microcontroller.<ref name=pb>{{cite web|url=http://www.xilinx.com/support/documentation/application_notes/xapp213.pdf|title=PicoBlaze 8-bit Microcontroller|publisher=Xilinx, Inc.|access-date=2007-06-25}}</ref>

==Instantiation==

When instantiating a PicoBlaze microprocessor in VHDL, the respective KCPSM component name must be used.<ref name=ug>{{cite web|url=http://www.xilinx.com/bvdocs/userguides/ug129.pdf|title=PicoBlaze 8-bit Embedded Microcontroller User Guide|publisher=Xilinx, Inc.|access-date=2007-06-25|url-status=dead|archive-url=https://web.archive.org/web/20070927185738/http://www.xilinx.com/bvdocs/userguides/ug129.pdf|archive-date=2007-09-27}}</ref> For example, for a PicoBlaze3 processor: <syntaxhighlight lang="vhdl"> component kcpsm3 is port ( address : out std_logic_vector(9 downto 0); instruction : in std_logic_vector(17 downto 0); port_id : out std_logic_vector(7 downto 0); write_strobe : out std_logic; out_port : out std_logic_vector(7 downto 0); read_strobe : out std_logic; in_port : in std_logic_vector(7 downto 0); interrupt : in std_logic; interrupt_ack : out std_logic; reset : in std_logic; clk : in std_logic ); end component; </syntaxhighlight>

==Performance==

All instructions execute in two clock cycles, making performance of the core instruction set deterministic. Interrupt response is not more than five clock cycles. As a resource optimization, it is possible for two PicoBlaze cores to share the same 1k x 18 instruction PROM, taking advantage of the dual-ported implementation of this block on Xilinx FPGAs.

==Architectural notes== Xilinx documents the PicoBlaze as requiring just 96 FPGA slices. The small implementation size is achieved in part through a fairly rigid separation of the instruction sequencing side (program counter, call-return stack, implied stack pointer, and interrupt enable bit) from the execution side (ALU, register file, scratchpad RAM, Z/C status bits). The only information which flows from the compute side to the sequencing side are the zero and carry ALU status bits, when tested by the conditional JUMP and CALL instructions. It is not possible to implement computed jumps or function pointers{{dubious|date=November 2022}}. The only information which flows from the sequencing side to the execution side are operand fields: destination register (4 bits), ALU opcode (six bits), optional source register (4 bits), optional 8-bit immediate value/port-address, optional 6-bit scratchpad address. There is no mechanism to inspect the value of the stack pointer, the contents of the 31-entry stack, the interrupt enable bit, or the contents of program memory.

The instruction sequencing side does not contain an adder, so relative branches and position independent code are not possible. All jump and call addresses are absolute{{dubious|date=November 2022}}.

The PicoBlaze is poorly suited to programming in compiled languages such as C.<ref>{{cite book|author=Pong P. Chu|title=FPGA Prototyping by VHDL Examples: Xilinx Spartan-3 Version|isbn=978-0-470-18531-5|year=2008|publisher=Wiley & Sons}}</ref> In addition to the lack of support for function pointers{{dubious|date=November 2020}}, there are no instructions or addressing modes to expedite a stack-based calling convention. For PicoBlaze it takes two instructions to implement PUSH or POP and two instructions to implement relative addressing off a software-designated stack pointer. The PicoBlaze is better suited to a hand-optimized register-based calling convention. This does not preclude the use of a Forth-like data stack, and in fact the PicoBlaze is well suited to this approach, if the 64-byte scratchpad memory offers sufficient space.

==See also==

* MicroBlaze

==External links==

Processor and derivatives: * [https://web.archive.org/web/20030501203653/http://www.xilinx.com/picoblaze/ PicoBlaze on the Xilinx website] * [http://www.xilinx.com/support/documentation/ip_documentation/ug129.pdf PicoBlaze user manual] * [https://web.archive.org/web/20060911010008/http://www.xilinx.com/ipcenter/processor_central/picoblaze/picoblaze_user_resources.htm PicoBlaze user resources] * [http://pwo.fpga.be/coursematerial.html Implementation of picoblaze in LabVIEW FPGA on the Xilinx Spartan 3E Starter board] * [http://bleyer.org/pacoblaze PacoBlaze: an open source synthesizable and behavioral Verilog clone of PicoBlaze] * [http://bleyer.org/pacoblaze/picoblaze.pdf PacoBlaze implementation description] * [http://wiki.hevs.ch/uit/index.php5/Components/IP/NanoBlaze NanoBlaze: a VHDL model with generics to define various sizes] {{Webarchive|url=https://web.archive.org/web/20161031212541/http://wiki.hevs.ch/uit/index.php5/Components/IP/NanoBlaze |date=2016-10-31 }} * [https://github.com/krabo0om/pauloBlaze PauloBlaze: an open source VHDL model fully compatible with the ISA of the kcpsm6]

Tools: * [http://code.google.com/p/pblazasm Open source Picoblaze assembler] * [http://www.ivysim.com/picoblaze/debug/ PicoBlaze Debugger, Software and RTL Hardware development with ModelSim] * [http://www.moravia-microsystems.com/multitarget-development-system/ MDS, Professional IDE for Linux and Windows] * [http://www.fautronix.com/fidex FIDEx, an assembler IDE for Linux, MAC and Windows] * [http://www.mediatronix.com/pBlazASM pBlazASM, an open source assembler and simulator for Windows]{{dead link|date=March 2018 |bot=InternetArchiveBot |fix-attempted=yes }} * [https://web.archive.org/web/20051027185700/http://www.mediatronix.com/tools/index.htm pBlazIDE, an assembler IDE for Windows] * [http://www.xs4all.nl/~marksix kpicosim, an open source assembler IDE for Linux] * [http://code.google.com/p/opbasm Opbasm, Cross-platform Open Picoblaze macro assembler for kcpsm3 and kcpsm6] * [https://picoblaze-simulator.sourceforge.io PicoBlaze Simulator in JavaScript]

==References== ;Notes {{reflist}} ;Bibliography * Ivanov Vl. '''[http://www.cit.iit.bas.bg/CIT_2015/v-15-5s/11_Vladimir_Ivanov-edited-md-Gotovo.pdf Using a PicoBlaze Processor to Traffic Light Control.] {{Webarchive|url=https://web.archive.org/web/20200806101054/http://www.cit.iit.bas.bg/CIT_2015/v-15-5s/11_Vladimir_Ivanov-edited-md-Gotovo.pdf |date=2020-08-06 }}''' Cybernetics and Information Technologies, 15, 5, Marin Drinov, 2015, Online {{ISSN|1314-4081}}, {{doi|10.1515/cait-2015-0023}}, pp.&nbsp;131 – 139. SJR:0.212 {{RISC-based processor architectures}} {{Soft microprocessors}} {{Programmable Logic}}

Category:Soft microprocessors