Pascal (microarchitecture)

{{Short description|GPU microarchitecture by Nvidia}} {{Use American English|date=April 2023}} {{Use mdy dates|date=April 2023}} {{Infobox GPU microarchitecture | name = Pascal | image = File:NVIDIA-GTX-1070-FoundersEdition-FL.jpg | image_size = 300 | caption = A GTX 1070 Founders Edition graphics based on the Pascal architecture | alt = | launched = {{Start date and age|2016|05|27}} | discontinued = | soldby = | designfirm = Nvidia | manuf1 = {{ubl |TSMC |Samsung}} | process = {{ubl |TSMC 16FF |Samsung 14{{nbsp}}nm}} | codename = GP10x

| products-desktop1 = GeForce GTX 10 series | products-hedt1 = Quadro P | products-server1 = Tesla P4

| opengl-compute-version = | cuda-compute-version = | directcompute-version =

| compute = | slowest = | slow-unit = | fastest = | fast-unit = | shader-clock = | l0-cache = | l1-cache = 24{{nbsp}}KB (per SM) | l2-cache = 256{{nbsp}}KB—4{{nbsp}}MB | l3-cache = | memory-support = {{ubl |GDDR5 |GDDR5X |HBM2}} | memory-clock = | pcie-support = PCIe 3.0

| encode-codec = {{hlist |H.264 |H.265}} | decode-codec = {{hlist |H.264 |H.265 |VP9}} | color-depth = {{hlist |8-bit |10-bit}} | encoders = NVENC | display-outputs = {{ubl |DisplayPort 1.4a |HDMI 2.0b |DVI}}

| predecessor = Maxwell | successor = {{ubl |{{Nowrap|Turing (consumer)}} |{{Nowrap|Volta (professional)}}}} |support_status=Limited support until November 2025<br>Security updates until October 2028<ref>{{Cite web |last=Kampman |first=Jeffrey |date=2025-07-31 |title=Nvidia confirms end of Game Ready driver support for Maxwell and Pascal GPUs — affected products will get optimized drivers through October 2025 |url=https://www.tomshardware.com/pc-components/gpus/nvidia-confirms-end-of-game-ready-driver-support-for-maxwell-and-pascal-gpus-affected-products-will-get-optimized-drivers-through-october-2025 |access-date=2025-08-21 |website=Tom's Hardware |language=en}}</ref>}}right|thumb|Painting of Blaise Pascal, eponym of architecture '''Pascal''' is the codename for a GPU microarchitecture developed by Nvidia, as the successor to the Maxwell architecture. The architecture was first introduced in April 2016 with the release of the Tesla P100 (GP100) on April 5, 2016, and is primarily used in the GeForce 10 series, starting with the GeForce GTX 1080 and GTX 1070 (both using the GP104 GPU), which were released on May 27, 2016, and June 10, 2016, respectively. Pascal was manufactured using TSMC's 16 nm FinFET process,<ref>{{cite news |title=NVIDIA 7nm Next-Gen-GPUs To Be Built By TSMC |url=https://wccftech.com/nvidia-7nm-next-gen-gpus-tsmc/ |access-date=6 July 2019 |work=Wccftech |date=24 June 2018}}</ref> and later Samsung's 14{{nbsp}}nm FinFET process.<ref name="techpowerup2">{{cite web|title = Samsung to Optical-Shrink NVIDIA "Pascal" to 14 nm|url = https://www.techpowerup.com/224976/samsung-to-optical-shrink-nvidia-pascal-to-14-nm.html|access-date = August 13, 2016}}</ref>

The architecture is named after the 17th century French mathematician and physicist, Blaise Pascal.

In April 2019, Nvidia enabled a software implementation of DirectX Raytracing on Pascal-based cards starting with the GTX 1060 6 GB, and in the 16 series cards, a feature reserved to the Turing-based RTX series up to that point.<ref>{{cite web|url=https://www.nvidia.com/en-us/geforce/news/geforce-gtx-ray-tracing-coming-soon/|title=Accelerating The Real-Time Ray Tracing Ecosystem: DXR For GeForce RTX and GeForce GTX|work=NVIDIA}}</ref><ref>{{Cite web|url=https://www.tomsguide.com/us/ray-tracing-gtx-gpu-driver,news-29847.html|title = Ray Tracing Comes to Nvidia GTX GPUs: Here's How to Enable It|date = 11 April 2019}}</ref>

== Details == thumb|Die shot of the GP100 GPU used in Nvidia Tesla P100 cards thumb|Die shot of the GP102 GPU found inside GeForce GTX 1080 Ti cards thumb|150px|Die shot of the GP106 GPU found inside GTX 1060 cards In March 2014, Nvidia announced that the successor to Maxwell would be the Pascal microarchitecture; announced on May 6, 2016, and released on May 27 of the same year. The Tesla P100 (GP100 chip) has a different version of the Pascal architecture compared to the GTX GPUs (GP104 chip). The shader units in GP104 have a Maxwell-like design.<ref name="GTX1080WhitePaper">{{cite web|url=http://international.download.nvidia.com/geforce-com/international/pdfs/GeForce_GTX_1080_Whitepaper_FINAL.pdf |title=NVIDIA GeForce GTX 1080 |website=International.download.nvidia.com |access-date=2016-09-15}}</ref>

Architectural improvements of the GP100 architecture include the following:<ref name="nvidia-blog-20140325">{{cite web|last=Gupta |first=Sumit |url=http://blogs.nvidia.com/blog/2014/03/25/gpu-roadmap-pascal/ |title=NVIDIA Updates GPU Roadmap; Announces Pascal |publisher=Blogs.nvidia.com |date=2014-03-21 |access-date=2014-03-25}}</ref><ref>{{cite web |url=http://devblogs.nvidia.com/parallelforall/ |title=Parallel Forall |publisher=Devblogs.nvidia.com |work=NVIDIA Developer Zone |access-date=2014-03-25 |archive-url=https://web.archive.org/web/20140326025738/http://devblogs.nvidia.com/parallelforall/ |archive-date=2014-03-26 |url-status=dead }}</ref><ref>{{cite web|url=https://images.nvidia.com/content/pdf/tesla/whitepaper/pascal-architecture-whitepaper.pdf |title=NVIDIA Tesla P100 |website=International.download.nvidia.com |access-date=2016-09-15}}</ref> * In Pascal, a SM (streaming multiprocessor) consists of between 64-128 CUDA cores, depending on if it is GP100 or GP104. Maxwell contained 128 CUDA cores per SM; Kepler had 192, Fermi 32 and Tesla 8. The GP100 SM is partitioned into two processing blocks, each having 32 single-precision CUDA cores, an instruction buffer, a warp scheduler, 2 texture mapping units and 2 dispatch units. * CUDA Compute Capability 6.0. * High Bandwidth Memory 2 — some cards feature 16 GiB HBM2 in four stacks with a total bus width of 4096 bits and a memory bandwidth of 720 GB/s. * Unified memory — a memory architecture where the CPU and GPU can access both main system memory and memory on the graphics card with the help of a technology called "Page Migration Engine". * NVLink — a high-bandwidth bus between the CPU and GPU, and between multiple GPUs. Allows much higher transfer speeds than those achievable by using PCI Express; estimated to provide between 80 and 200 GB/s.<ref>{{cite web |url=https://devblogs.nvidia.com/parallelforall/inside-pascal/ |title=Inside Pascal: NVIDIA's Newest Computing Platform |date=2016-04-05}}</ref><ref>{{cite web | url = http://devblogs.nvidia.com/parallelforall/nvlink-pascal-stacked-memory-feeding-appetite-big-data/ | title = NVLink, Pascal and Stacked Memory: Feeding the Appetite for Big Data | date = 2014-03-25 | access-date = 2014-07-07 | author = Denis Foley | website = nvidia.com }}</ref> * 16-bit (FP16) floating-point operations (colloquially "half precision") can be executed at twice the rate of 32-bit floating-point operations ("single precision")<ref>{{cite web|title=NVIDIA's Next-Gen Pascal GPU Architecture to Provide 10X Speedup for Deep Learning Apps |url=http://blogs.nvidia.com/blog/2015/03/17/pascal/|website=The Official NVIDIA Blog|access-date=23 March 2015}}</ref> and 64-bit floating-point operations (colloquially "double precision") executed at half the rate of 32-bit floating point operations.<ref name="anandtech_pascal1">{{cite news |last1=Smith |first1=Ryan |date=2015-04-05 |title=NVIDIA Announces Tesla P100 Accelerator - Pascal GP100 Power for HPC |url=http://www.anandtech.com/show/10222/nvidia-announces-tesla-p100-accelerator-pascal-power-for-hpc |archive-url=https://web.archive.org/web/20160406022858/http://www.anandtech.com/show/10222/nvidia-announces-tesla-p100-accelerator-pascal-power-for-hpc |url-status=dead |archive-date=April 6, 2016 |newspaper=AnandTech |access-date=2016-05-27 |quote=Each of those SMs also contains 32 FP64 CUDA cores - giving us the 1/2 rate for FP64 - and new to the Pascal architecture is the ability to pack 2 FP16 operations inside a single FP32 CUDA core under the right circumstances}}</ref> * More registers — twice the amount of registers per CUDA core compared to Maxwell. * More shared memory. * Dynamic load balancing scheduling system.<ref name="RyanSmithDynamicScheduling">{{Cite news | url=http://www.anandtech.com/show/10325/the-nvidia-geforce-gtx-1080-and-1070-founders-edition-review/9 | archive-url=https://web.archive.org/web/20160723082341/http://www.anandtech.com/show/10325/the-nvidia-geforce-gtx-1080-and-1070-founders-edition-review/9 | url-status=dead | archive-date=July 23, 2016 | title=The NVIDIA GeForce GTX 1080 & GTX 1070 Founders Editions Review: Kicking Off the FinFET Generation | first=Ryan | last=Smith | date=July 20, 2016 | access-date=July 21, 2016 | newspaper=AnandTech | page=9}}</ref> This allows the scheduler to dynamically adjust the amount of the GPU assigned to multiple tasks, ensuring that the GPU remains saturated with work except when there is no more work that can safely be distributed to distribute.<ref name="RyanSmithDynamicScheduling"/> Nvidia therefore has safely enabled asynchronous compute in Pascal's driver.<ref name="RyanSmithDynamicScheduling"/> * Instruction-level and thread-level preemption.<ref name="RyanSmithPreemption">{{Cite news | url=http://www.anandtech.com/show/10325/the-nvidia-geforce-gtx-1080-and-1070-founders-edition-review/10 | archive-url=https://web.archive.org/web/20160724001444/http://www.anandtech.com/show/10325/the-nvidia-geforce-gtx-1080-and-1070-founders-edition-review/10 | url-status=dead | archive-date=July 24, 2016 | title=The NVIDIA GeForce GTX 1080 & GTX 1070 Founders Editions Review: Kicking Off the FinFET Generation | first=Ryan | last=Smith | date=July 20, 2016 | access-date=July 21, 2016 | newspaper=AnandTech | page=10}}</ref> Architectural improvements of the GP104 architecture include the following:<ref name="GTX1080WhitePaper"/> * CUDA Compute Capability 6.1. * GDDR5X — new memory standard supporting 10Gbit/s data rates, updated memory controller.<ref>{{cite web|url=http://www.geforce.com/hardware/10series/geforce-gtx-1080 |title=GTX 1080 Graphics Card |publisher=GeForce |access-date=2016-09-15}}</ref> * Simultaneous Multi-Projection - generating multiple projections of a single geometry stream, as it enters the SMP engine from upstream shader stages.<ref>{{cite web|last=Carbotte |first=Kevin |url=http://www.tomshardware.com/reviews/nvidia-geforce-gtx-1080-pascal,4572-3.html |title=Nvidia GeForce GTX 1080 Simultaneous Multi-Projection & Async Compute |website=Tomshardware.com |date=2016-05-17 |access-date=2016-09-15}}</ref> * DisplayPort 1.4, HDMI 2.0b. * Fourth generation Delta Color Compression. * Enhanced SLI Interface — SLI interface with higher bandwidth compared to the previous versions. * PureVideo Feature Set H hardware video decoding HEVC Main10 (10-bit), Main12 (12-bit) and VP9 hardware decoding. * HDCP 2.2 support for 4K DRM protected content playback and streaming (Maxwell GM200 and GM204 lack HDCP 2.2 support, GM206 supports HDCP 2.2).<ref>{{cite web|url=http://www.geforce.com/hardware/10series/geforce-gtx-1080/|title=Nvidia Pascal HDCP 2.2|access-date=2016-05-08|work=Nvidia Hardware Page}}</ref> * NVENC HEVC Main10 10bit hardware encoding. * GPU Boost 3.0. * Instruction-level preemption.<ref name="RyanSmithPreemption"/> In graphics tasks, the driver restricts preemption to the pixel-level, because pixel tasks typically finish quickly and the overhead costs of doing pixel-level preemption are lower than instruction-level preemption (which is expensive).<ref name="RyanSmithPreemption"/> Compute tasks get thread-level or instruction-level preemption,<ref name="RyanSmithPreemption"/> because they can take longer times to finish and there are no guarantees on when a compute task finishes. Therefore the driver enables the expensive instruction-level preemption for these tasks.<ref name="RyanSmithPreemption"/>

== {{Anchor|SMP}} Overview ==

=== Graphics Processor Cluster === A chip is partitioned into Graphics Processor Clusters (GPCs). For the GP104 chips, a GPC encompasses 5 SMs.

=== Streaming Multiprocessor "Pascal" === A "Streaming Multiprocessor" is analogous to AMD's Compute Unit. An SM encompasses 128 single-precision ALUs ("CUDA cores") on GP104 chips and 64 single-precision ALUs on GP100 chips. While all CU versions consist of 64 shader processors (i.e. 4 SIMD Vector Units, each 16 lanes wide), Nvidia experimented with very different numbers of CUDA cores: * On Tesla, 1 SM combines 8 single-precision (FP32) shader processors * On Fermi, 1 SM combines 32 single-precision (FP32) shader processors * On Kepler, 1 SM combines 192 single-precision (FP32) shader processors and 64 double-precision (FP64) units (on GK110 GPUs) * On Maxwell, 1 SM combines 128 single-precision (FP32) shader processors * On Pascal, it depends: ** On GP100, 1 SM combines 64 single-precision (FP32) shader processors and also 32 double-precision (FP64) providing a 2:1 ratio of single- to double-precision throughput. The GP100 uses more flexible FP32 cores that are able to process one single-precision or two half-precision numbers in a two-element vector.<ref name="RyanSmithPrecision">{{Cite news | url=http://www.anandtech.com/show/10325/the-nvidia-geforce-gtx-1080-and-1070-founders-edition-review/5 | archive-url=https://web.archive.org/web/20160723235825/http://www.anandtech.com/show/10325/the-nvidia-geforce-gtx-1080-and-1070-founders-edition-review/5 | url-status=dead | archive-date=July 23, 2016 | title=The NVIDIA GeForce GTX 1080 & GTX 1070 Founders Editions Review: Kicking Off the FinFET Generation | first=Ryan | last=Smith | date=July 20, 2016 | access-date=July 21, 2016 | newspaper=AnandTech | page=5}}</ref> This is intended to better serve machine learning tasks. ** On GP104, 1 SM combines 128 single-precision ALUs, 4 double-precision ALUs (providing a 32:1 ratio), and one half-precision ALU which contains a vector of two half-precision floats which can execute the same instruction on both floats, providing a 64:1 ratio if the same instruction is used on both elements.

=== Polymorph-Engine 4.0 === The Polymorph Engine version 4.0 is the unit responsible for Tessellation. It corresponds functionally with AMD's Geometric Processor. It has been moved from the shader module to the TPC to allow one Polymorph engine to feed multiple SMs within the TPC.<ref>{{Cite news | url=http://www.anandtech.com/show/10325/the-nvidia-geforce-gtx-1080-and-1070-founders-edition-review/4 | archive-url=https://web.archive.org/web/20160723235820/http://www.anandtech.com/show/10325/the-nvidia-geforce-gtx-1080-and-1070-founders-edition-review/4 | url-status=dead | archive-date=July 23, 2016 | title=The NVIDIA GeForce GTX 1080 & GTX 1070 Founders Editions Review: Kicking Off the FinFET Generation | first=Ryan | last=Smith | date=July 20, 2016 | access-date=July 21, 2016 | newspaper=AnandTech | page=4}}</ref>

=== Chips === thumb|GTX 1080 Ti PCB and die * GP100: Nvidia's Tesla P100 GPU accelerator is targeted at GPGPU applications such as FP64 double precision compute and deep learning training that uses FP16. It uses HBM2 memory.<ref name="InsidePascal">{{cite web | first=Mark | last=Harris | url=https://devblogs.nvidia.com/parallelforall/inside-pascal/ | title=Inside Pascal: NVIDIA's Newest Computing Platform | publisher=Nvidia | work=Parallel Forall | date=April 5, 2016 | access-date=June 3, 2016}}</ref> Quadro GP100 also uses the GP100 GPU. * GP102: This GPU is used in the Titan Xp,<ref>{{cite web|url=https://www.nvidia.com/en-us/geforce/products/10series/titan-xp/|title=NVIDIA TITAN Xp Graphics Card with Pascal Architecture|website=NVIDIA}}</ref> Titan X Pascal<ref>{{cite web|url=https://www.nvidia.com/en-us/geforce/products/10series/titan-x-pascal/ |title=NVIDIA TITAN X Graphics Card with Pascal |publisher=GeForce |access-date=2016-09-15}}</ref> and the GeForce GTX 1080 Ti. It is also used in the Quadro P6000<ref>{{cite web|url=http://www.nvidia.com/object/quadro-graphics-with-pascal.html |title=New Quadro Graphics Built on Pascal Architecture |publisher=NVIDIA |access-date=2016-09-15}}</ref> & Tesla P40.<ref>{{cite web|url=http://www.nvidia.com/object/data-center-solutions.html |title=Accelerating Data Center Workloads with GPUs |publisher=NVIDIA |access-date=2016-09-15}}</ref> * GP104: This GPU is used in the GeForce GTX 1070, GTX 1070 Ti, GTX 1080, and some GTX 1060 6 GB's. The GTX 1070 has 15/20 and the GTX 1070 Ti has 19/20 of its SMs enabled; both utilize GDDR5 memory. The GTX 1080 is a fully unlocked chip and uses GDDR5X memory. Some GTX 1060 6 GB's use GP104 with 10/20 SMs enabled and GDDR5X memory.<ref>{{Cite web |author1=Zhiye Liu |date=2018-10-22 |title=Nvidia GeForce GTX 1060 Gets GDDR5X in Fifth Makeover |url=https://www.tomshardware.com/news/nvidia-geforce-gtx-1060-gddr5x-specs,37961.html |access-date=2024-02-02 |website=Tom's Hardware |language=en}}</ref> It is also used in the Quadro P5000, Quadro P4000, Quadro P3200 (mobile applications) and Tesla P4. * GP106: This GPU is used in the GeForce GTX 1060 with GDDR5<ref>{{Cite web|url=https://www.nvidia.com/en-us/geforce/10-series/|title=NVIDIA GeForce 10 Series Graphics Cards|website=NVIDIA}}</ref> memory.<ref>{{cite web|url=http://videocardz.com/61583/nvidia-geforce-gtx-1060-to-be-released-on-july-7th |title=NVIDIA GeForce GTX 1060 to be released on July 7th |website=VideoCardz.com |date=29 June 2016 |access-date=2016-09-15}}</ref><ref>{{cite web|url=http://www.geforce.com/hardware/10series/geforce-gtx-1060 |title=GTX 1060 Graphics Cards |publisher=GeForce |access-date=2016-09-15}}</ref> It is also used in the Quadro P2000. * GP107: This GPU is used in the GeForce GTX 1050 and 1050 Ti. It is also used in the Quadro P1000, Quadro P600, Quadro P620 & Quadro P400. * GP108: This GPU is used in the GeForce GT 1010 and GeForce GT 1030.

{| class="wikitable" style="text-align: right;" |+ Comparison table of some Kepler, Maxwell, and Pascal chips |- ! !! GK104 !! GK110 !! GM204 (GTX 970) !! GM204 (GTX 980) !! GM200 !! GP104 !! GP100 |- | Dedicated texture cache per SM || 48 KiB || {{N/a}} || {{N/a}} || {{N/a}} || {{N/a}} || {{N/a}} || {{N/a}} |- | Texture (graphics or compute) or read-only data (compute only) cache per SM || {{N/a}} || 48 KiB<ref name="GK110">{{Cite news| url=http://www.anandtech.com/show/6446/nvidia-launches-tesla-k20-k20x-gk110-arrives-at-last/3 | archive-url=https://web.archive.org/web/20121114215913/http://www.anandtech.com/show/6446/nvidia-launches-tesla-k20-k20x-gk110-arrives-at-last/3 | url-status=dead | archive-date=November 14, 2012 | title=NVIDIA Launches Tesla K20 & K20X: GK110 Arrives At Last | first=Ryan | last=Smith | newspaper=AnandTech | date=November 12, 2012 | access-date=July 24, 2016 | page=3}}</ref> || {{N/a}} || {{N/a}} || {{N/a}} || {{N/a}} || {{N/a}} |- | rowspan="3" | Programmer-selectable shared memory/L1 partitions per SM || 48 KiB shared memory + 16 KiB L1 cache (default)<ref name="CudaCProgrammingGuide">{{cite web | url=http://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html | author=Nvidia | title=CUDA C Programming Guide | date=September 1, 2015 | access-date=July 24, 2016}}</ref> || 48 KiB shared memory + 16 KiB L1 cache (default)<ref name="CudaCProgrammingGuide"/> || rowspan="3" {{N/a}} || rowspan="3" {{N/a}} || rowspan="3" {{N/a}} || rowspan="3" {{N/a}} || rowspan="3" {{N/a}} |- | 32 KiB shared memory + 32 KiB L1 cache<ref name="CudaCProgrammingGuide"/> || 32 KiB shared memory + 32 KiB L1 cache<ref name="CudaCProgrammingGuide"/> |- | 16 KiB shared memory + 48 KiB L1 cache<ref name="CudaCProgrammingGuide"/> || 16 KiB shared memory + 48 KiB L1 cache<ref name="CudaCProgrammingGuide"/> |- | Unified L1 cache/texture cache per SM || {{N/a}} || {{N/a}} || 48 KiB<ref name="hardware.fr">{{Cite news| url=http://www.hardware.fr/articles/948-2/gp104-7-2-milliards-transistors-16-nm.html | title=Nvidia GeForce GTX 1080, le premier GPU 16nm en test ! | first=Damien | last=Triolet | date=May 24, 2016 | language=fr | access-date=July 24, 2016 | newspaper=Hardware.fr | page=2}}</ref> || 48 KiB<ref name="hardware.fr"/> || 48 KiB<ref name="hardware.fr"/> || 48 KiB<ref name="hardware.fr"/> || 24 KiB<ref name="hardware.fr"/> |- | Dedicated shared memory per SM || {{N/a}} || {{N/a}} || 96 KiB<ref name="hardware.fr"/> || 96 KiB<ref name="hardware.fr"/> || 96 KiB<ref name="hardware.fr"/> || 96 KiB<ref name="hardware.fr"/> || 64 KiB<ref name="hardware.fr"/> |- | L2 cache per chip || 512 KiB<ref name="hardware.fr"/> || 1536 KiB<ref name="hardware.fr"/> || 1792 KiB<ref name="GTX970FraudCorrections">{{Cite news | url=http://www.anandtech.com/show/8935/geforce-gtx-970-correcting-the-specs-exploring-memory-allocation | archive-url=https://web.archive.org/web/20150128095356/http://www.anandtech.com/show/8935/geforce-gtx-970-correcting-the-specs-exploring-memory-allocation | url-status=dead | archive-date=January 28, 2015 | title=GeForce GTX 970: Correcting The Specs & Exploring Memory Allocation | first=Ryan | last=Smith | date=January 26, 2015 | access-date=July 24, 2016 | newspaper=AnandTech | page=1}}</ref>|| 2048 KiB<ref name="GTX970FraudCorrections"/> ||3072 KiB<ref name="hardware.fr"/> || 2048 KiB<ref name="hardware.fr"/> || 4096 KiB<ref name="hardware.fr"/> |}

== Performance == The theoretical single-precision processing power of a Pascal GPU in GFLOPS is computed as 2 × operations per FMA instruction per CUDA core per cycle × number of CUDA cores × core clock speed (in GHz).

The theoretical double-precision processing power of a Pascal GPU is 1/2 of the single precision performance on Nvidia GP100, and 1/32 of Nvidia GP102, GP104, GP106, GP107 & GP108.

The theoretical half-precision processing power of a Pascal GPU is 2× of the single precision performance on GP100<ref name="anandtech_pascal1"/> and 1/64 on GP104, GP106, GP107 & GP108.<ref name="RyanSmithPrecision"/>

== Successor == The Pascal architecture was succeeded in 2017 by Volta in the HPC, cloud computing, and self-driving car markets, and in 2018 by Turing in the consumer and business market.<ref name="Techradar">{{cite web|url=https://www.techradar.com/news/nvidia-turing|title=NVIDIA Turing Release Date|work=Techradar|date=2 February 2021}}</ref>

==P100 accelerator and DGX-1== {{NvidiaDgxAccelerators}}

== References == {{Reflist|30em}}

Category:Nvidia microarchitectures Nvidia Pascal