{{Short description|none}} {{Update|date=May 2010}} {{Expand list|date=May 2010}} '''[[Turion 64]]''' is a family of CPUs designed by [[AMD]] for the mobile computing market.

==Features overview== {{empty section|date=March 2023}} <!-- Template:AMD x86 CPU features was deleted per oldid=1142398499#Template:AMD_x86_CPU_features -->

==Single-core mobile processors==

===Turion 64===

===="Lancaster" ([[90 nanometer|90 nm]])==== * All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[3DNow!|Enhanced 3DNow!]], [[NX bit]], [[AMD64]], [[PowerNow!]]'' {| class="wikitable" |- !Model number!!Frequency!![[CPU caches#Multi-level caches|L2 cache]]!![[HyperTransport|HT]]!![[Clock multiplier|Multi]]{{efn|name=fn_1}}!!Voltage!![[Thermal Design Power|TDP]]!!Socket!!Release date!!Order part number |- |Turion 64 ML-28 ||1600&nbsp;MHz||512 [[Kilobyte|KB]]||800&nbsp;MHz||8x||1.35||35 W||[[Socket 754]]||June 22, 2005||TMDML28BKX4LD |- |Turion 64 ML-30 ||1600&nbsp;MHz||1024 KB||800&nbsp;MHz||8x||1.35||35 W||Socket 754||March 10, 2005||TMDML30BKX5LD |- |Turion 64 ML-32 ||1800&nbsp;MHz||512 KB||800&nbsp;MHz||9x||1.35||35 W||Socket 754||March 10, 2005||TMDML32BKX4LD |- |Turion 64 ML-34 ||1800&nbsp;MHz||1024 KB||800&nbsp;MHz||9x||1.35||35 W||Socket 754||March 10, 2005||TMDML34BKX5LD |- |Turion 64 ML-37 ||2000&nbsp;MHz||1024 KB||800&nbsp;MHz||10x||1.35||35 W||Socket 754||March 10, 2005||TMDML37BKX5LD |- |Turion 64 ML-40 ||2200&nbsp;MHz||1024 KB||800&nbsp;MHz||11x||1.35||35 W||Socket 754||June 22, 2005||TMDML40BKX5LD |- |Turion 64 ML-42 ||2400&nbsp;MHz||512 KB||800&nbsp;MHz||12x||1.35||35 W||Socket 754||October 4, 2005||TMDML42BKX4LD |- |Turion 64 ML-44 ||2400&nbsp;MHz||1024 KB||800&nbsp;MHz||12x||1.35||35 W||Socket 754||January 4, 2006||TMDML44BKX5LD |- |Turion 64 MT-28 ||1600&nbsp;MHz||512 KB||800&nbsp;MHz||8x||1.2||25 W||Socket 754||June 22, 2005||TMSMT28BQX4LD |- |Turion 64 MT-30 ||1600&nbsp;MHz||1024 KB||800&nbsp;MHz||8x||1.2||25 W||Socket 754||March 10, 2005||TMSMT30BQX5LD |- |Turion 64 MT-32 ||1800&nbsp;MHz||512 KB||800&nbsp;MHz||9x||1.2||25 W||Socket 754||March 10, 2005||TMSMT32BQX4LD |- |Turion 64 MT-34 ||1800&nbsp;MHz||1024 KB||800&nbsp;MHz||9x||1.2||25 W||Socket 754||March 10, 2005||TMSMT34BQX5LD |- |Turion 64 MT-37 ||2000&nbsp;MHz||1024 KB||800&nbsp;MHz||10x||1.2||25 W||Socket 754||August 8, 2005||TMSMT37BQX5LD |- |Turion 64 MT-40 ||2200&nbsp;MHz||1024 KB||800&nbsp;MHz||11x||1.2||25 W||Socket 754||August 8, 2005||TMSMT40BQX5LD |}

===="Richmond" ([[90 nanometer|90 nm]])==== * All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[3DNow!|Enhanced 3DNow!]], [[NX bit]], [[AMD64]], [[PowerNow!]], [[AMD-V]]'' {| class="wikitable" |- !Model number!!Frequency!![[CPU caches#Multi-level caches|L2 cache]]!![[HyperTransport|HT]]!![[Clock multiplier|Multi]]{{efn|name=fn_1}}!!Voltage!![[Thermal Design Power|TDP]]||Socket!!Release date!!Order part number |- |Turion 64 MK-36 ||2000&nbsp;MHz||512 KB||800&nbsp;MHz||10x||1.15||31 W||[[Socket S1]]g1||September 1, 2006||TMDMK36HAX4CM |- |Turion 64 MK-38 ||2200&nbsp;MHz||512 KB||800&nbsp;MHz||11x||1.15||31 W||Socket S1g1||Q1 2007|| TMDMK38HAX4CM |}

===Sempron (Turion 64-based)=== ===="Sable" ([[65 nm]])==== * All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[3DNow!|Enhanced 3DNow!]], [[NX bit]], [[AMD64]], [[PowerNow!]]''

{| class="wikitable" |- !Model number!!Frequency!![[CPU caches#Multi-level caches|L2 cache]]!![[HyperTransport|HT]]!![[Clock multiplier|Multi]]{{efn|name=fn_1}}!!Voltage!![[Thermal Design Power|TDP]]||Socket!!Release date!!Order part number |- |Sempron SI-40||2000&nbsp;MHz||512 KB||1800&nbsp;MHz||10x||1.075 - 1.125||25 W||[[Socket S1]]g2||June 4, 2008||SMSI40SAM12GG |- |Sempron SI-42||2100&nbsp;MHz ||512 KB||1800&nbsp;MHz||10.5x||1.075 - 1.125||25 W||Socket S1g2||Q3 2008||SMSI42SAM12GG |}

===Athlon (Turion 64-based)=== ===="Sable" ([[65 nm]])==== * All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[3DNow!|Enhanced 3DNow!]], [[NX bit]], [[AMD64]], [[PowerNow!]], [[AMD-V]]'' {| class="wikitable" |- !Model number!!Frequency!![[CPU caches#Multi-level caches|L2 cache]]!![[HyperTransport|HT]]!![[Clock multiplier|Multi]]{{efn|name=fn_1}}!!Voltage!![[Thermal Design Power|TDP]]||Socket!!Release date!!Order part number |- |[https://www.notebookservice030.de/downloads/docs/AMD%20Processors%20for%20Notebooks_QI-46.pdf Athlon QI-46]||2100&nbsp;MHz||512 KB||1800&nbsp;MHz||10.5x|| ||25 W||Socket S1g2|| ||AMQI46SAM12GG |}

===Sempron (Turion X2-based)===

===="Huron" ([[65 nm]])==== * All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[3DNow!|Enhanced 3DNow!]], [[NX bit]], [[AMD64]]''

{| class="wikitable" |- !Model number!!Frequency!![[CPU caches#Multi-level caches|L2 cache]]!![[HyperTransport|HT]]!![[Clock multiplier|Multi]]{{efn|name=fn_1}}!!Voltage!![[Thermal Design Power|TDP]]||Socket!!Release date!!Order part number |- |Sempron 200U||1000&nbsp;MHz||256 KB||800&nbsp;MHz||5x||0.925||8 W||[[Socket ASB1]]||January 2009||SMF200UOAX3DV |- |Sempron 210U||1500&nbsp;MHz||256 KB||800&nbsp;MHz||7.5x||0.925||15 W||Socket ASB1||January 2009||SMG210UOAX3DX |}

===Sempron (Turion II-based)===

===="Caspian" ([[45 nm]])==== * All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSE4a]], [[3DNow!|Enhanced 3DNow!]], [[NX bit]], [[AMD64]], [[PowerNow!]], [[AMD-V]]''

{| class="wikitable" |- !Model number!!Frequency!![[CPU caches#Multi-level caches|L2 cache]]!![[Floating-point unit|FPU width]]<ref name="The 2009 AMD Mainstream Platform">[https://www.amd.com/us/products/notebook/platforms/home/next-gen/Pages/platform-next-gen-notebooks.aspx The 2009 AMD Mainstream Platform]</ref>!![[HyperTransport|HT]]!![[Clock multiplier|Multi]]{{efn|name=fn_1}}!![[Thermal Design Power|TDP]]||Socket!!Release date!!Order part number |- |Sempron M100||2000&nbsp;MHz||512 KB||64-bit||1600&nbsp;MHz||10x||25 W||[[Socket S1]]g3||September 10, 2009||SMM100SBO12GQ |- |Sempron M120||2100&nbsp;MHz||512 KB||64-bit||1600&nbsp;MHz||10.5x||25 W||Socket S1g3||September 10, 2009||SMM120SBO12GQ |- |Sempron M140||2200&nbsp;MHz||512 KB||64-bit||1600&nbsp;MHz||10.5x||25 W||Socket S1g3||April 2010||SMM140SBO12GQ |}

==Dual-core mobile processors==

===Turion 64 X2===

===="Taylor" ([[90 nanometer|90 nm]])==== * All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[3DNow!|Enhanced 3DNow!]], [[NX bit]], [[AMD64]], [[PowerNow!]], [[AMD-V]]'' {| class="wikitable" |- !Model number!!Frequency!![[CPU caches#Multi-level caches|L2 cache]]!![[HyperTransport|HT]]!![[Clock multiplier|Multi]]{{efn|name=fn_1}}!!Voltage!![[Thermal Design Power|TDP]]||Socket!!Release date!!Order part number |- |Turion 64 X2 TL-50 ||1600&nbsp;MHz||2 × 256 KB||800&nbsp;MHz||8x||0.8 - 1.1||31 W||[[Socket S1]]g1||May 17, 2006||TMDTL50HAX4CT |}

===="Trinidad" ([[90 nanometer|90 nm]])==== * All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[3DNow!|Enhanced 3DNow!]], [[NX bit]], [[AMD64]], [[PowerNow!]], [[AMD-V]]'' {| class="wikitable" |- !Model number!!Frequency!![[CPU caches#Multi-level caches|L2 cache]]!![[HyperTransport|HT]]!![[Clock multiplier|Multi]]{{efn|name=fn_1}}!!Voltage!![[Thermal Design Power|TDP]]||Socket!!Release date!!Order part number |- |Turion 64 X2 TL-52 ||1600&nbsp;MHz||2 × 512 KB||800&nbsp;MHz||8x||0.8-1.125||31 W||[[Socket S1]]g1||May 17, 2006||TMDTL52HAX5CT |- |Turion 64 X2 TL-56 ||1800&nbsp;MHz||2 × 512 KB||800&nbsp;MHz||9x||0.8-1.125||33 W||Socket S1g1||May 17, 2006||TMDTL56HAX5CT |- |Turion 64 X2 TL-60 ||2000&nbsp;MHz||2 × 512 KB||800&nbsp;MHz||10x||0.8-1.125||35 W||Socket S1g1||May 17, 2006||TMDTL60HAX5CT |- |Turion 64 X2 TL-64 ||2200&nbsp;MHz||2 × 512 KB||800&nbsp;MHz||11x||0.8-1.125||35 W||Socket S1g1||January 30, 2007||TMDTL64HAX5CT |}

=== Athlon 64 X2 ===

===="Tyler" ([[65 nm]])==== * All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[3DNow!|Enhanced 3DNow!]], [[NX bit]], [[AMD64]], [[PowerNow!]], [[AMD-V]]''

{| class="wikitable" |- !Model Number!!Frequency!![[CPU caches#Multi-level caches|L2-Cache]]!![[HyperTransport|HT]]!!Multiplier{{efn|name=fn_1}}!!Voltage!![[Thermal Design Power|TDP]]||Socket!!Release date!!Order Part Number |- |Athlon 64 X2 TK-42 ||1600&nbsp;MHz||2 x 512 KB||800&nbsp;MHz||8x||1.075/1.10/1.125 V||20 W||[[Socket S1]]g1||2009 ||AMETK42HAX5DM |- |Athlon 64 X2 TK-53 ||1700&nbsp;MHz||2 x 256 KB||800&nbsp;MHz||8.5x||1.075/1.10/1.125 V||31 W||Socket S1g1||Aug 20, 2007||AMDTK53HAX4DC |- |Athlon 64 X2 TK-55 ||1800&nbsp;MHz||2 x 256 KB||800&nbsp;MHz||9x||1.075/1.10/1.125 V||31 W||Socket S1g1||Aug 20, 2007||AMDTK55HAX4DC |- |Athlon 64 X2 TK-57 ||1900&nbsp;MHz||2 x 256 KB||800&nbsp;MHz||9.5x||1.075/1.10/1.125 V||31 W||Socket S1g1|| 2008 ||AMDTK57HAX4DM |}

=== Turion 64 X2 ===

===="Tyler" ([[65 nm]])==== * All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[3DNow!|Enhanced 3DNow!]], [[NX bit]], [[AMD64]], [[PowerNow!]], [[AMD-V]]''

{| class="wikitable" |- !Model Number!!Frequency!![[CPU caches#Multi-level caches|L2-Cache]]!![[HyperTransport|HT]]!!Multiplier{{efn|name=fn_1}}!!Voltage!![[Thermal Design Power|TDP]]||Socket!!Release date!!Order Part Number |- |Turion 64 X2 TL-56 ||1800&nbsp;MHz||2 x 512 KB||800&nbsp;MHz||9x||1.075/1.10/1.125 V||31 W||[[Socket S1]]g1||May 7, 2007||TMDTL56HAX5DC |- |Turion 64 X2 TL-56 ||1800&nbsp;MHz||2 x 512 KB||800&nbsp;MHz||9x||1.075/1.10/1.125 V||35 W||Socket S1g1||May 7, 2007||TMDTL56HAX5DM |- |Turion 64 X2 TL-58 ||1900&nbsp;MHz||2 x 512 KB||800&nbsp;MHz||9.5x||1.075/1.10/1.125 V||31 W||Socket S1g1||May 7, 2007||TMDTL58HAX5DC |- |Turion 64 X2 TL-58 ||1900&nbsp;MHz||2 x 512 KB||800&nbsp;MHz||9.5x||1.075/1.10/1.125 V||35 W||Socket S1g1||May 7, 2007||TMDTL58HAX5DM |- |Turion 64 X2 TL-60 ||2000&nbsp;MHz||2 x 512 KB||800&nbsp;MHz||10x||1.075/1.10/1.125 V||31 W||Socket S1g1||May 7, 2007||TMDTL60HAX5DC |- |Turion 64 X2 TL-60 ||2000&nbsp;MHz||2 x 512 KB||800&nbsp;MHz||10x||1.075/1.10/1.125 V||35 W||Socket S1g1||May 7, 2007||TMDTL60HAX5DM |- |Turion 64 X2 TL-62 ||2100&nbsp;MHz||2 x 512 KB||800&nbsp;MHz||10.5x||1.075/1.10/1.125 V||35 W||Socket S1g1||May 7, 2007 ||TMDTL62HAX5DM |- |Turion 64 X2 TL-64 ||2200&nbsp;MHz||2 x 512 KB||800&nbsp;MHz||11x||1.075/1.10/1.125 V||35 W||Socket S1g1||May 7, 2007||TMDTL64HAX5DC |- |Turion 64 X2 TL-64 ||2200&nbsp;MHz||2 x 512 KB||800&nbsp;MHz||11x||1.075/1.10/1.125 V||35 W||Socket S1g1||May 7, 2007||TMDTL64HAX5DM |- |Turion 64 X2 TL-66 ||2300&nbsp;MHz||2 x 512 KB||800&nbsp;MHz||11.5x||1.075/1.10/1.125 V||35 W||Socket S1g1||May 7, 2007||TMDTL66HAX5DC |- |Turion 64 X2 TL-66 ||2300&nbsp;MHz||2 x 512 KB||800&nbsp;MHz||11.5x||1.075/1.10/1.125 V||35 W||Socket S1g1||May 7, 2007||TMDTL66HAX5DM |- |Turion 64 X2 TL-68 ||2400&nbsp;MHz||2 x 512 KB||800&nbsp;MHz||12x||1.075/1.10/1.125 V||35 W||Socket S1g1||Dec 19, 2007||TMDTL68HAX5DM |}

===Turion X2 / Turion X2 Ultra===

===="Lion" ([[65 nm]])==== * All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[3DNow!|Enhanced 3DNow!]], [[NX bit]], [[AMD64]], [[PowerNow!]], [[AMD-V]]''

{| class="wikitable" |- !Model number!!Frequency!![[CPU caches#Multi-level caches|L2 cache]]!![[HyperTransport|HT]]!![[Clock multiplier|Multi]]{{efn|name=fn_1}}!!Voltage!![[Thermal Design Power|TDP]]||Socket!!Release date!!Order part number |- |Turion X2 Ultra ZM-80<ref name="Turion X2">[https://www.amd.com/uk/products/notebook/processors/turion-x2/Pages/turion-x2-ultra-model-numbers.aspx AMD Turion X2/Turion X2 Ultra]</ref>||2100&nbsp;MHz||2 x 1 MB||1800&nbsp;MHz||10.5x||0.75-1.2||32 W||[[Socket S1]]g2||June 4, 2008||TMZM80DAM23GG |- |Turion X2 Ultra ZM-82<ref name="Turion X2" />||2200&nbsp;MHz||2 x 1 MB||1800&nbsp;MHz||11x||0.75-1.2||35 W||Socket S1g2||June 4, 2008||TMZM82DAM23GG |- |Turion X2 Ultra ZM-84<ref name="Turion X2" />||2300&nbsp;MHz||2 x 1 MB||1800&nbsp;MHz||11.5x||0.75-1.2||35 W||Socket S1g2||Q3 2008||TMZM84DAM23GG |- |Turion X2 Ultra ZM-85<ref name="Turion X2" />||2300&nbsp;MHz||2 x 1 MB||2200&nbsp;MHz||11.5x||0.75-1.2||35 W||Socket S1g2||Q3 2008||TMZM85DAM23GG |- |Turion X2 Ultra ZM-86<ref name="Turion X2" />||2400&nbsp;MHz||2 x 1 MB||1800&nbsp;MHz||12x||0.75-1.2||35 W||Socket S1g2||June 4, 2008||TMZM86DAM23GG |- |Turion X2 Ultra ZM-87<ref name="Turion X2" />||2400&nbsp;MHz||2 x 1 MB||2200&nbsp;MHz||12x||0.75-1.2||35 W||Socket S1g2||Q3 2008||TMZM87DAM23GG |- |Turion X2 Ultra ZM-88<ref name="Turion X2" />||2500&nbsp;MHz||2 x 1 MB||1800&nbsp;MHz||12.5x||0.75-1.2||35 W||Socket S1g2||Q3 2008||TMZM88DAM23GG |- |Turion X2 RM-70<ref name="Turion X2" />||2000&nbsp;MHz||2 x 512 KB||1800&nbsp;MHz||10x||0.75-1.2||31 W||Socket S1g2||June 4, 2008||TMRM70DAM22GG |- |Turion X2 RM-72<ref name="Turion X2" />||2100&nbsp;MHz||2 x 512 KB||1800&nbsp;MHz||10.5x||0.75-1.2||35 W||Socket S1g2||Q3 2008||TMRM72DAM22GG |- |Turion X2 RM-74<ref name="Turion X2" />||2200&nbsp;MHz||2 x 512 KB||1800&nbsp;MHz||11x||0.75-1.2||35 W||Socket S1g2||Q4 2008||TMRM74DAM22GG |- |Turion X2 RM-75<ref name="Turion X2" />||2200&nbsp;MHz||2 x 512 KB||2000&nbsp;MHz||11x||0.75-1.2||35 W||Socket S1g2||Q4 2008||TMRM75DAM22GG |- |Turion X2 RM-76<ref name="Turion X2" />||2300&nbsp;MHz||2 x 512 KB||1800&nbsp;MHz||11.5x||0.75-1.2||35 W||Socket S1g2||Q4 2008||TMRM76DAM22GG |- |Turion X2 RM-77<ref name="Turion X2" />||2300&nbsp;MHz||2 x 512 KB||2000&nbsp;MHz||11.5x||0.75-1.2||35 W||Socket S1g2||Q4 2008||TMRM77DAM22GG |- |Athlon X2 QL-60||1900&nbsp;MHz||2 x 512 KB||1800&nbsp;MHz||9.5x||0.95-1.1||35 W||Socket S1g2||June 4, 2008||AMQL60DAM22GG |- |Athlon X2 QL-62||2000&nbsp;MHz||2 x 512 KB||1800&nbsp;MHz||10x||0.95-1.1||35 W||Socket S1g2||Q3 2008||AMQL62DAM22GG |- |Athlon X2 QL-64||2100&nbsp;MHz||2 x 512 KB||1800&nbsp;MHz||10.5x||0.95-1.1||35 W||Socket S1g2||Q4 2008||AMQL64DAM22GG |- |Athlon X2 QL-65||2100&nbsp;MHz||2 x 512 KB||2000&nbsp;MHz||10.5x||0.95-1.1||35 W||Socket S1g2||Q4 2008||AMQL65DAM22GG |- |Athlon X2 QL-66||2200&nbsp;MHz||2 x 512 KB||1800&nbsp;MHz||11x||0.95-1.1||35 W||Socket S1g2||Q4 2008||AMQL66DAM22GG |- |Athlon X2 QL-67||2200&nbsp;MHz||2 x 512 KB||2000&nbsp;MHz||11x||0.95-1.1||35 W||Socket S1g2||Q4 2008||AMQL67DAM22GG |}

===="Conesus" ([[65 nm]])==== * All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[3DNow!|Enhanced 3DNow!]], [[NX bit]], [[AMD64]], [[AMD-V]]'' * Turion Neo X2 L625 supports AMD [[PowerNow!]] technology

{| class="wikitable" |- !Model number!!Frequency!![[CPU caches#Multi-level caches|L2 cache]]!![[HyperTransport|HT]]!![[Clock multiplier|Multi]]{{efn|name=fn_1}}!!Voltage!![[Thermal Design Power|TDP]]||Socket!!Release date!!Order part number |- |Athlon Neo X2 L325<ref>[https://www.amd.com/us/Documents/43838F_ECSD_selection_guide.pdf AMD Athlon Neo X2]</ref>||1500&nbsp;MHz||2 x 512 KB||800&nbsp;MHz||7.5x||0.925||18 W||[[Socket ASB1]]||June 2009||AMZL325OAX5DY |- |Athlon Neo X2 L335<ref>{{Cite web |url=http://forums.amd.com/forum/messageview.cfm?catid=34&threadid=116940 |title=AMD Athlon Neo X2 |access-date=2009-11-29 |archive-date=2011-10-07 |archive-url=https://web.archive.org/web/20111007083744/http://forums.amd.com/forum/messageview.cfm?catid=34&threadid=116940 |url-status=dead }}</ref>||1600&nbsp;MHz||2 x 256 KB||800&nbsp;MHz||8x||0.925||18 W||Socket ASB1||June 2009||AMZL335OAX5DY |- |Turion mobile X2 L510||1600&nbsp;MHz||2 x 512 KB||800&nbsp;MHz||8x||0.925||18 W||Socket ASB1||June 2009||AMZL510OAX5DY |- |Turion Neo X2 L625<ref>[https://www.amd.com/us/products/notebook/processors/turion-neo-x2/Pages/turion-neo-x2-model-numbers.aspx AMD Turion Neo X2]</ref>||1600&nbsp;MHz||2 x 512 KB||800&nbsp;MHz||8x||0.925||18 W||Socket ASB1||June 2009||TMZL625OAX5DY |}

===Turion II / Turion II Ultra / Turion II Neo===

===="Caspian" ([[45 nm]])==== * All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSE4a]], [[3DNow!|Enhanced 3DNow!]], [[NX bit]], [[AMD64]], [[PowerNow!]], [[AMD-V]]'' * All models are to be used with [[DDR2 SDRAM|DDR2]] memory (Socket S1g3 default design)

{| class="wikitable" |- !Model number!!Frequency!![[CPU caches#Multi-level caches|L2 cache]]!![[Floating-point unit|FPU width]]<ref name="The 2009 AMD Mainstream Platform"/>!![[HyperTransport|HT]]!![[Clock multiplier|Multi]]{{efn|name=fn_1}}!![[Thermal Design Power|TDP]]||Socket!!Release date!!Order part number |- |Athlon II M300||2000&nbsp;MHz||width="70 px"|2x 512 KB||64-bit||1600&nbsp;MHz||10x||35 W||[[Socket S1]]g3||September 10, 2009||AMM300DBO22GQ |- |Athlon II M320||2100&nbsp;MHz||2x 512 KB||64-bit||1600&nbsp;MHz||10.5x||35 W||Socket S1g3||September 10, 2009||AMM320DBO22GQ |- |Athlon II M340||2200&nbsp;MHz||2x 512 KB||64-bit||1600&nbsp;MHz||11x||35 W||Socket S1g3||September 10, 2009||AMM340DBO22GQ |- |Athlon II M360||2300&nbsp;MHz||2x 512 KB||64-bit||1600&nbsp;MHz||11x||35 W||Socket S1g3||May 2010||AMM360DBO22GQ |- |Turion II M500||2200&nbsp;MHz||2x 512 KB||128-bit||1800&nbsp;MHz||11x||35 W||Socket S1g3||September 10, 2009||TMM500DBO22GQ |- |Turion II M520||2300&nbsp;MHz||2x 512 KB||128-bit||1800&nbsp;MHz||11.5x||35 W||Socket S1g3||September 10, 2009||TMM520DBO22GQ |- |Turion II M540||2400&nbsp;MHz||2x 512 KB||128-bit||1800&nbsp;MHz||12x||35 W||Socket S1g3||September 10, 2009||TMM540DBO22GQ |- |Turion II M560||2500&nbsp;MHz||2x 512 KB||128-bit||1800&nbsp;MHz||12x||35 W||Socket S1g3||April 2010||TMM560DBO22GQ |- |Turion II Ultra M600||2400&nbsp;MHz||2x 1 MB||128-bit||1800&nbsp;MHz||12x||35 W||Socket S1g3||September 10, 2009||TMM600DBO23GQ |- |Turion II Ultra M620||2500&nbsp;MHz||2x 1 MB||128-bit||1800&nbsp;MHz||12.5x||35 W||Socket S1g3||September 10, 2009||TMM620DBO23GQ |- |Turion II Ultra M640||2600&nbsp;MHz||2x 1 MB||128-bit||1800&nbsp;MHz||13x||35 W||Socket S1g3||September 10, 2009||TMM640DBO23GQ |- |Turion II Ultra M660||2700&nbsp;MHz||2x 1 MB||128-bit||1800&nbsp;MHz||13.5x||35 W||Socket S1g3||September 10, 2009||TMM660DBO23GQ |}

==== "Champlain" ([[45 nm]]) ==== * All models support: ''[[MMX (instruction set)|MMX]], [[Streaming SIMD Extensions|SSE]], [[SSE2]], [[SSE3]], [[SSE4a]], [[3DNow!|Enhanced 3DNow!]], [[NX bit]], [[AMD64]], [[PowerNow!]], [[AMD-V]]'' * All models are to be used with [[DDR3 SDRAM|DDR3]] memory (Socket S1g4 default design)

{{AMD Turion II (Champlain, dual-core)}}

===="Geneva" ([[45 nm]])==== {{AMD Turion II Neo (Geneva, dual-core)}}

==Notes== {{notelist|refs= {{efn|name=fn_1|For traditional processors, the [[Clock multiplier|multiplier]] is the value multiplied by the speed of the [[front-side bus|FSB]] to get the clock speed of the processor. Turion processors have a memory controller integrated on the CPU die, replacing the traditional concept of FSB. The multiplier here applies to the 200&nbsp;MHz system clock frequency, not the [[HyperTransport]] speed.}} }}

==See also== * [[AMD mobile platform]] * [[List of AMD mobile microprocessors]] * [[Table of AMD processors]]

==References== {{reflist}}

{{AMD processors}}

{{DEFAULTSORT:AMD Turion microprocessors}} [[Category:AMD x86 microprocessors|*Turion]] [[Category:Lists of microprocessors]]