{{Short description|Addendum to the USB-IF USB 2.0 specification}} {{Confuse|Inter-Integrated Circuit{{!}}Inter-Integrated Circuit (I²C)}} {{Use mdy dates|date=October 2021}}

'''Inter-Chip USB''' ('''IC-USB'''), sometimes referred to as '''USB-IC''' or '''Inter Chip USB''', is an addendum to the USB Implementers Forum (USB-IF) USB 2.0 specification. IC-USB is intended as a low-power variant of the standard physical USB interface, intended for direct chip-to-chip communications. The IC-USB bus's maximum length of 10&nbsp;cm results in a lower inductance and capacitance and therefore allows lower power requirements. IC-USB is used primarily in embedded systems; for example, ETSI (in specification TS 102 600)<ref name="ETSI-TS-102-600">{{Cite web |url=https://www.etsi.org/deliver/etsi_ts/102600_102699/102600/10.01.00_60/ts_102600v100100p.pdf |title=ETSI TS 102 600 v10.1.0: Smart Cards; UICC-Terminal interface; Characteristics of the USB interface (Release 10) |date=September 2020 |accessdate=October 7, 2021 |website=ETSI |format=PDF}}</ref> has standardized on IC-USB as the official high-speed interface for connections between the main chipset of a smartphone and the SIM card or UICC card.

{{anchor|HSIC}}'''High-Speed Inter-Chip''' ('''HSIC''') is a chip-to-chip variant of USB&nbsp;2.0 that eliminates the conventional analog transceivers found in normal USB. It was adopted as a standard by the USB-IF in 2007. The HSIC physical layer uses about 50% less power and 75% less board area compared to traditional USB&nbsp;2.0. HSIC uses two signals at 1.2&nbsp;V and has a throughput of 480&nbsp;Mbit/s. Maximum PCB trace length for HSIC is 10&nbsp;cm. It does not have low enough latency to support RAM sharing between two chips.<ref>{{cite web |title= Interchip Connectivity: HSIC, UniPro, HSI, C2C, LLI... oh my! |url= http://info.arteris.com/blog/bid/59433/Interchip-Connectivity-HSIC-UniPro-HSI-C2C-LLI-oh-my |accessdate= June 24, 2011 |url-status= live |archiveurl= https://web.archive.org/web/20110619022557/http://info.arteris.com/blog/bid/59433/Interchip-Connectivity-HSIC-UniPro-HSI-C2C-LLI-oh-my |archivedate= June 19, 2011 }}</ref><ref>{{cite web |title=USB High Speed Inter-Chip Interface |url=http://www.interfacebus.com/hsic-bus-high-speed-inter-chip-usb.html |accessdate= June 24, 2011 |url-status=live |archiveurl=https://web.archive.org/web/20110609163812/http://www.interfacebus.com/hsic-bus-high-speed-inter-chip-usb.html |archivedate=June 9, 2011}}</ref>

{{anchor|SSIC}}'''SuperSpeed Inter-Chip''' ('''SSIC''') is the USB&nbsp;3.0 successor of HSIC.<ref>{{cite web | url = https://www.synopsys.com/Company/Publications/DWTB/Pages/dwtb-transitioning-usb-jan2013.aspx | title = Transitioning from USB&nbsp;2.0 HSIC to USB&nbsp;3.0 SSIC | accessdate = August 7, 2015 | website = synopsys.com | url-status = dead | archiveurl = https://web.archive.org/web/20151007072152/http://www.synopsys.com/Company/Publications/DWTB/Pages/dwtb-transitioning-usb-jan2013.aspx | archivedate = October 7, 2015 }}</ref>

The USB-IF Inter-Chip USB Supplement was released in March 2006. ETSI TS 102 600,<ref name="ETSI-TS-102-600" /> which is ETSI's USB implementation requirements specification, was first released in December 2007.

== References == {{reflist}}

== Technical documents ==

* {{cite web |date=March 13, 2006 |title=Inter-Chip USB Supplement Revision 1.0 |url=https://www.usb.org/document-library/usb-20-specification |website=USB-IF}} * {{cite web |date=September 23, 2007 |title=High-Speed Inter-Chip USB Electrical Specification Revision 1.0 |url=https://www.usb.org/document-library/usb-20-specification |website=USB-IF}} * {{cite web |date=May 19, 2014 |title=Inter-Chip Supplement to the USB Revision 3.0 Specification, Revision 1.02 |url=https://www.usb.org/document-library/inter-chip-supplement-usb-revision-30-specification-revision-102 |publisher=USB-IF}} {{USB}} Category:USB Category:Computer buses Category:Motherboard