{{Short description|American system-on-chip technology company}} {{Infobox company | name = Arteris, Inc. | logo = Arteris updated logo.svg | type = Public | traded_as = {{unbulleted list|{{NASDAQ|AIP}}}} | founded = {{start date and age|2004}} | location = Campbell, California, United States | key_people = K. Charles Janac (CEO) | industry = {{Plainlist | * Semiconductors * Semiconductor Intellectual Property (IP) * Electronic Design Automation (EDA)}} | products = Network-on-Chip interconnect IP (coherent and non-coherent), SoC integration automation software, semiconductor hardware security assurance | revenue = US $92.8 million (Q1-2026) (Annual Contract Value (ACV) plus royalties) <ref>https://ir.arteris.com/news-releases/news-release-details/arteris-announces-financial-results-first-quarter-and-0</ref> | num_employees = 296 (2025) | parent = | website = {{URL|http://www.arteris.com}} }}

'''Arteris, Inc.''' is a multinational technology company headquartered in Campbell, California.<ref name="EE1">{{cite web|title=MegaChips Licenses Arteris FlexNoC Fabric IP for Next-Generation Imaging SoCs|url=http://www.eejournal.com/archives/news/20130129_08/|work=Electronic Engineering Journal|access-date=18 July 2013}}</ref> It develops the network-on-chip (NoC) IP, system-on-chip (SoC) integration automation software and semiconductor hardware security assurance that is used to create semiconductor chip and chiplet designs for a variety of devices, particularly in automotive electronics, artificial intelligence, machine learning, enterprise computing, communications, consumer, industrial, and aerospace and defense markets.<ref name=BZ>{{cite web|last=Schubarth|first=Cromwell|title=12 from Silicon Valley make 2012 Inc. 500 list|url=http://www.bizjournals.com/sanjose/blog/2012/08/12-from-silicon-valley-make-2012-inc.html?page=all|work=Silicon Valley Business Journal|access-date=18 July 2013}}</ref><ref name=FY>{{cite web|title=Arteris President and CEO K. Charles Janac Named Finalist of the Prestigious UBM Electronics ACE Awards in the Innovator of the Year Category|url=https://finance.yahoo.com/news/arteris-president-ceo-k-charles-130000912.html|work=Yahoo! Finance|access-date=18 July 2013}}</ref> The company specializes in the development and distribution of network-on-chip (NoC) interconnect intellectual property (IP) and SoC integration automation software products used for the underlying data movement within advanced semiconductors, including in support of growing AI workloads.

It is best known for its flagship product, FlexNoC®. Its technology has been shipped in over 4 billion units as of February 12, 2026. The company offers a non-coherent smart NoC IP called FlexGen® and a cache coherent interconnect IP product called Ncore™ as well as a last level cache called CodaCache®.<ref>{{Cite web |url=https://www.arteris.com/press-releases/arteris-ncore-cache-coherent-interconnect-heterogeneous-multicore-cache-coherency |title=Arteris Unveils Ncore Cache Coherent Interconnect for Efficient Heterogeneous Multicore SoC Designs |access-date=2021-09-30 |archive-date=2020-08-05 |archive-url=https://web.archive.org/web/20200805000305/https://www.arteris.com/press-releases/arteris-ncore-cache-coherent-interconnect-heterogeneous-multicore-cache-coherency |url-status=live}}</ref><ref>{{Cite web |url=https://www.arteris.com/press-releases/coda-cache-standalone-last-level-cache |title=Arteris Announces CodaCache™️ Standalone Last Level Cache |access-date=2021-09-30 |archive-date=2019-11-12 |archive-url=https://web.archive.org/web/20191112034151/https://www.arteris.com/press-releases/coda-cache-standalone-last-level-cache |url-status=live}}</ref> As a result of its acquisition of Magillem Design Services and Semifore, the company also offers a suite of IEEE-1685 IP-XACT and SystemRDL for IP packaging, SoC assembly and Hardware-Software integration. Following its 2026 acquisition of Cycuity, Arteris also provides hardware security assurance technologies, including tools for hardware security simulation (Cycuity® Radix-S), hardware security emulation (Cycuity® Radix-M), and hardware security static analysis (Cycuity® Radix-ST), designed to identify vulnerabilities during the semiconductor design process.

==History==

Arteris was founded in 2004 by Philippe Boucard and two other engineering executives who had worked together at T.Sqware, a startup that was acquired by Globespan.<ref name=SW>{{cite web|title=Arteris|url=http://www.semiwiki.com/forum/showwiki.php?title=Arteris:Arteris|work=SemiWiki.com|access-date=18 July 2013|archive-url=https://web.archive.org/web/20130820012130/http://www.semiwiki.com/forum/showwiki.php?title=Arteris:Arteris|archive-date=20 August 2013|url-status=dead}}</ref><ref name=ART>{{cite web|title=Products|url=http://www.arteris.com/products|work=Arteris.com|access-date=18 July 2013}}</ref><ref name=COR>{{cite web|title=Infos Legales Arteris|url=http://corporama.com/fr/societe/arteris/444681407|work=Corporama|access-date=18 July 2013}}</ref> Company executives wished to address problems with existing monolithic bus and crossbar interconnect technologies, such as wire and routing congestion, increased heat and power consumption, failed timing closure, and increased die area.<ref name=FY /><ref name=LI>{{cite web|title=About Arteris|url=http://www.linkedin.com/company/arteris|work=LinkedIn|access-date=18 July 2013}}</ref> The firm’s leadership sought and received venture capital totaling $44.1 million for the creation of its new technology from investors, including ARM Holdings, Crescendo Ventures, DoCoMo Capital, Qualcomm, Synopsys, TVM Capital, and Ventech.<ref name=VB1>{{cite web|last=Takahashi|first=Dean|title=Arteris raises $9.7M in fourth round for chip design tools|url=https://venturebeat.com/2009/12/06/arteris-raises-9-7m-in-fourth-round-for-chip-design-tools/|work=VentureBeat|access-date=18 July 2013}}</ref><ref name=EE5>{{cite web|title=Carbon and Arteris Partner to Deliver Interconnect Models to SoC Designers|url=http://www.eejournal.com/archives/news/20120308-06/|work=Electronic Engineering Journal|access-date=18 July 2013}}</ref>

By 2006, Arteris developed the first commercially available NoC IP product, called NoC Solution, followed in 2009 by a more advanced product, FlexNoC.<ref name=FY /><ref name=ET>{{cite web|last=Clarke|first=Peter|title=Network-on-chip firm upgrades IP library, tool set|url=http://www.eetimes.com/document.asp?doc_id=1246342|work=EE Times|access-date=18 July 2013}}</ref><ref name=TVM>{{cite web|title=Arteris, Inc. |url=http://www.tvm-capital-technology.com/portfolio/arteris/ |archive-url=https://web.archive.org/web/20121120092013/http://www.tvm-capital-technology.com/portfolio/arteris/ |url-status=dead |archive-date=20 November 2012 |work=TVM Capital Technology |access-date=18 July 2013}}</ref> The products used “packetization and a distributed network of small interconnect elements to address congestion, timing, power and performance issues.”<ref name=FY /><ref name=EE6>{{cite web|last=Moyer|first=Bryon|title=Networks on a Chip Not Just Another NoC NoC Joke|url=http://www.eejournal.com/archives/articles/20090929_noc/|work=Electronic Engineering Journal|access-date=18 July 2013}}</ref> Arteris marketed FlexNoC as an improvement on traditional SoCs interconnect fabrics, citing its reduction in gate count by 30 percent, reduction of wires by 50 percent, and a more compact chip floor as compared to a functionally equivalent hybrid bus or crossbar.<ref name="EE1"/><ref name=LI /><ref name=OA>{{cite web|last=Handy|first=Jim|title=NoC Interconnect Improves SoC Economics|url=http://www.objective-analysis.com/uploads/NoC_Interconnect_Improves_SoC_Economics_-_Objective_Analysis.pdf|work=Objective Analysis|access-date=18 July 2013}}</ref>

Designers of SoCs began to take advantage of the technology’s increased design efficiency, flexibility, and a significant reduction in production costs.<ref name=OA /><ref name=EE2>{{cite web|title=Synopsys and Arteris Develop IP Solution to Reduce Mobile Phone Memory Costs|url=http://www.eejournal.com/archives/news/20120229-06/|work=Electronics Engineering Journal|access-date=18 July 2013}}</ref><ref name=EE3>{{cite web|title=Synopsys and Arteris Enable Earlier Multicore SoC Architecture Optimization with Faster Turnaround Times|url=http://www.eejournal.com/archives/news/20120215-06/|work=Electronic Engineering Journal|access-date=18 July 2013}}</ref><ref name=EE4>{{cite web|title=Arteris, EVE Strengthen Partnership to Provide Enhanced Design Flow for Mobile, Wireless SoCs|url=http://www.eejournal.com/archives/news/20110314-01/|work=Electronic Engineering Journal|access-date=18 July 2013}}</ref> By 2012, the company had over 40 semiconductor customers, including Qualcomm, Samsung, Texas Instruments, Toshiba, and LG Electronics, with 200 million SoCs being produced with Arteris IP.<ref name=FY /><ref name=Toshiba>{{Cite web |url=https://www.arteris.com/press-releases/silicon-proven-arteris-ip-ncore-cache-coherent-interconnect-implemented-in-toshiba-iso-26262-compliant-adas-chip |title=Silicon-Proven Arteris IP Ncore® Cache Coherent Interconnect Implemented in Toshiba ISO 26262-Compliant ADAS Chip |access-date=2021-09-30 |archive-date=2021-03-06 |archive-url=https://web.archive.org/web/20210306012823/https://www.arteris.com/press-releases/silicon-proven-arteris-ip-ncore-cache-coherent-interconnect-implemented-in-toshiba-iso-26262-compliant-adas-chip |url-status=live}}</ref>

In October 2013, Qualcomm Technologies, Inc. acquired the FlexNoC network-on-chip product portfolio, but Arteris retained existing customer contracts and to continue licensing FlexNoC and modifying the source code for customer support. Qualcomm will provide engineering deliverables for the FlexNoC product line and updates to Arteris. Qualcomm does not maintain any ownership interest in Arteris.<ref>{{cite web | url = http://www.arteris.com/Qualcomm-Arteris-asset-acquisition-2013_oct_31 | title = Certain Arteris Technology Assets Acquired |access-date= 5 September 2014}}</ref><ref>{{cite web | url = http://www.fiercewireless.com/tech/story/qualcomm-acquires-arteris-noc-tech-assets-team/2013-11-01 | title = Qualcomm acquires Arteris' NoC tech assets, team |access-date= 5 September 2014}}</ref>

In September 2014, Arteris launched the Arteris FlexNoC Resilience Package, which added functional safety mechanisms to the FlexNoC interconnect IP useful for ISO 26262 and IEC 61508 standards compliance.<ref>{{Cite web |url=https://www.arteris.com/press-releases/flexnoc-resilience-package-30-sep-2014 |title=Arteris FlexNoC Resilience Package Enhances Redundancy, Fault Tolerance for Mission Critical Systems-on-Chip |access-date=2021-09-30 |archive-date=2020-12-04 |archive-url=https://web.archive.org/web/20201204231253/https://www.arteris.com/press-releases/flexnoc-resilience-package-30-sep-2014 |url-status=live}}</ref>

In May 2016, Arteris released its first version of the Ncore cache coherent interconnect IP product with optional support for functional safety.<ref name=Anandtech>{{cite web|last=Frumusanu|first=Andrei|title=Arteris Announces Ncore Cache-Coherent Interconnect|url=https://www.anandtech.com/show/10339/arteris-announces-ncore-cachecoherent-interconnect/|work=AnandTech|access-date=30 September 2021|archive-date=2020-12-05 |archive-url=https://web.archive.org/web/20201205051703/https://www.anandtech.com/show/10339/arteris-announces-ncore-cachecoherent-interconnect |url-status=dead}}</ref>

Arteris presented the Ncore cache coherent interconnect IP version 3 and the optional Ncore Resilience Package for functional safety at the Linley Processor Conference in October 2017.<ref>{{Cite web |title=ArterisIP announces Ncore 3 Cache Coherent Interconnect |url=https://www.design-reuse.com/news/42821/arterisip-ncore-3-cache-coherent-interconnect.html |access-date=2023-11-15 |website=Design And Reuse |language=en}}</ref>

In 2020, Arteris acquired Magillem Design Services, adding a suite of IP-XACT-based products for automating the creation of systems-on-chip and their associated software and firmware, verification and simulation platforms, and specifications and customer documentation.<ref name=EENewsmagillem>{{cite web|last=Flaherty|first=Nick|title=Arteris IP buys assets of Magillem Design Services |url=https://www.eenewsembedded.com/news/arteris-ip-buys-assets-magillem-design-services/|work=EE News Embedded|access-date=30 September 2021|archive-date=2021-09-30 |archive-url=https://web.archive.org/web/20210930230232/https://www.eenewsembedded.com/news/arteris-ip-buys-assets-magillem-design-services |url-status=live}}</ref><ref name=SemiEngMagillem>{{cite web|last=Shuler|first=Kurt|title=An Acquisition To Streamline SoC Integration |url=https://semiengineering.com/an-acquisition-to-streamline-soc-integration/ | work=Semiconductor Engineering|access-date=30 September 2021|archive-date=2021-02-27 |archive-url=https://web.archive.org/web/20210227161319/https://semiengineering.com/an-acquisition-to-streamline-soc-integration/ |url-status=live}}</ref>

In 2021, Arteris announced the pricing of its initial public offering (IPO), listing under Nasdaq:AIP.<ref>{{Cite web |title=Arteris IP Announces Pricing of Initial Public Offering - Arteris |url=https://www.arteris.com/press-releases/arteris-ip-announces-pricing-of-initial-public-offering-ipo/ |access-date=2023-11-15 |language=en-US}}</ref><ref>{{Cite web |date=2023-11-15 |title=Arteris, Inc. Common Stock |url=https://www.nasdaq.com/market-activity/stocks/aip |access-date=2023-11-15 |website=nasdaq.com}}</ref>

In 2023, Arteris acquired Semifore, a provider of Hardware-Software Interface technology, to accelerate system-on-chip development and integration automation.<ref>{{Cite web |title=Arteris Acquires Semifore to Accelerate System-on-Chip Development - Arteris |url=https://www.arteris.com/press-releases/arteris-acquires-semifore-to-accelerate-system-on-chip-development/ |access-date=2023-11-15 |language=en-US}}</ref>

Also in 2023, Arteris launched FlexNoC 5 physically aware network-on-chip (NoC) interconnect IP. FlexNoC 5 enables SoC architecture teams, logic designers and integrators to incorporate physical constraint management across power, performance and area (PPA) to deliver a physically aware IP connecting the SoC. This technology enables 5X faster physical convergence over manual refinements with fewer iterations from the layout team for automotive, communications, consumer electronics, enterprise computing, and industrial applications.

In 2024, Arteris released the latest version of Ncore cache coherent interconnect IP. The latest release of Ncore works with multiple processor IPs, including RISC-V and the next-generation Armv9 Cortex processor IP. Ncore boasts multi-protocol support, allowing seamless integration of IPs connected to the same NoC fabric. Designers can choose from CHI-E, CHI-B and ACE fully coherent agent interfaces and ACE-Lite IO-coherent interfaces. AXI is also supported for interfacing with sub-systems or devices without coherency requirements. These capabilities enhance the flexibility and adaptability of Ncore, making it an ideal solution for complex and evolving SoC designs, including safety-critical applications.

In 2025, Arteris launched FlexGen, a revolutionary, smart NoC interconnect IP. With up to a 10x productivity boost, FlexGen slashes design iterations, significantly reducing the time required to develop cutting-edge chips. It also achieves up to a 30% reduction in wire length to lower power use, and up to 10% reduction in latency that results in improved performance in SoC and chiplet designs.

In 2026, Arteris closed the acquisition of Cycuity, a provider of semiconductor cybersecurity assurance technology. By combining system IP from Arteris with silicon hardware security assurance technology from Cycuity, the acquisition positions Arteris to address growing concerns around hardware security.<ref>{{cite web |title=Arteris Closes Acquisition of Cycuity |url=https://www.arteris.com/press-releases/arteris-closes-acquisition-of-cycuity |website=Arteris |access-date=<!-- 14 January 2026 -->}}</ref>

As of February 2026, its technology has shipped in more than 4 billion devices, signifying important growth in enabling the underlying data movement for AI-era chips and chiplets.<ref name=Arteris4B>{{Cite web |url=https://www.arteris.com/press-releases/arteris-network-on-chip-technology-achieves-deployment-milestone-of-4-billion-chips-and-chiplets/ |title=Arteris Network-on-Chip Technology Achieves Deployment Milestone of 4 Billion Chips and Chiplets |access-date=2026-02-20 |url-status=live}}</ref>

==Licensees== Arteris claims to have had 200+ licensees of its products since its inception in 2004 with over 880+ design starts created with its IP products, with deployments in over 4 billion units.<ref>{{Cite web |url=https://www.arteris.com/press-releases/arteris-ip-announces-4d-lidar-pioneer-aeva-as-its-200th-customer |title=Arteris® IP Announces 4D LiDAR Pioneer Aeva as its 200th Customer |access-date=2021-09-30 |archive-date=2021-09-28 |archive-url=https://web.archive.org/web/20210928152005/https://www.arteris.com/press-releases/arteris-ip-announces-4d-lidar-pioneer-aeva-as-its-200th-customer |url-status=live}}</ref><ref>{{Cite web |url=https://www.arteris.com/press-releases/arteris-ip-adds-a-record-28-new-licensees-in-2020 |title=Arteris® IP Adds a Record 28 New Licensees in 2020 |access-date=2021-09-30 |archive-date=2021-03-03 |archive-url=https://web.archive.org/web/20210303023054/https://www.arteris.com/press-releases/arteris-ip-adds-a-record-28-new-licensees-in-2020 |url-status=live}}</ref><ref>{{Cite web |url=https://www.arteris.com/about-arteris/ |title=About Arteris |access-date=2025-11-03 |url-status=live}}</ref>

These licensees include AMD, Altera, and Axelera AI, as well as top-20 semiconductor makers such as Samsung Electronics, NXP, Texas Instruments, STMicroelectronics, Renesas Electronics, and Mobileye.<ref name=AMD>{{Cite web |url=https://www.arteris.com/press-releases/arteris-to-provide-flexgen-smart-noc-ip-in-next-generation-amd-ai-chiplet-designs/ |title=Arteris to Provide FlexNoC Smart Interconnect IP in Next-Generation AMD AI Chiplet Designs |access-date=2025-11-03 |url-status=live}}</ref><ref name=AxeleraAI>{{Cite web |url=https://www.arteris.com/press-releases/arteris-selected-by-axelera-ai-to-accelerate-computer-vision-for-edge-devices/ |title=Arteris Selected by Axelera AI to Accelerate Computer Vision for Edge Devices |access-date=2025-11-03 |url-status=live}}</ref><ref>{{Cite web |url=https://www.arteris.com/press-releases/arteris-ip-flexnoc-interconnect-products-licensed-by-samsung-foundry-for-worldwide-us |title=Arteris® IP FlexNoC® Interconnect Products Again Licensed by Samsung Foundry for Worldwide Use |access-date=2021-09-30 |archive-date=2021-04-11 |archive-url=https://web.archive.org/web/20210411092226/https://www.arteris.com/press-releases/arteris-ip-flexnoc-interconnect-products-licensed-by-samsung-foundry-for-worldwide-us |url-status=live}}</ref><ref name=NXP>{{Cite web |url=https://www.arteris.com/press-releases/arteris-technology-deployed-more-broadly-by-nxp-to-accelerate-edge-ai-leadership/ |title=Arteris Technology Deployed More Broadly by NXP to Accelerate Edge AI Leadership |access-date=2026-02-20 |url-status=live}}</ref><ref name=TexasInstruments>{{Cite web |url=https://www.arteris.com/press-releases/ti-iot-arteris-pr-2015-02-25 |title=Arteris FlexNoC Helps Enable Texas Instruments Wireless Connectivity for the Internet of Things (IoT) |access-date=2021-09-30 |archive-date=2021-03-02 |archive-url=https://web.archive.org/web/20210302140209/https://www.arteris.com/press-releases/ti-iot-arteris-pr-2015-02-25 |url-status=live}}</ref><ref name=STMicroelectronics>{{Cite web |url=https://www.arteris.com/press-releases/stmicroelectronics-licenses-arteris-flexnoc-resilience-for-iso26262-compliance |title=Arteris FlexNoC Resilience Package IP Licensed by STMicroelectronics |access-date=2021-09-30 |archive-date=2021-02-27 |archive-url=https://web.archive.org/web/20210227043026/https://www.arteris.com/press-releases/stmicroelectronics-licenses-arteris-flexnoc-resilience-for-iso26262-compliance |url-status=live}}</ref><ref>{{Cite web |url=https://www.arteris.com/press-releases/renesas-licenses-arteris-flexnoc-arterisip |title=ArterisIP FlexNoC Interconnect Licensed by Renesas |access-date=2021-09-30 |archive-date=2019-09-14 |archive-url=https://web.archive.org/web/20190914101319/http://www.arteris.com/press-releases/renesas-licenses-arteris-flexnoc-arterisip |url-status=live}}</ref><ref name=MobileyeEyeQ6>{{Cite web |url=https://www.arteris.com/press-releases/mobileye-eyeq-arteris-ip-ai-autonomous-driving |title=Arteris IP Ncore® and FlexNoC® Interconnects and Resilience Packages Licensed by Mobileye for AI-Powered EyeQ Chips |access-date=2021-09-30 |archive-date=2021-01-22 |archive-url=https://web.archive.org/web/20210122103858/https://www.arteris.com/press-releases/mobileye-eyeq-arteris-ip-ai-autonomous-driving |url-status=live}}</ref><ref name=Altera>{{Cite web |url=https://www.arteris.com/press-releases/altera_arteris_flexnoc_3_june_2013 |title=Altera Licenses Arteris FlexNoC Interconnect Fabric IP for System-on-Chip Products |access-date=2021-09-30 |archive-date=2021-03-02 |archive-url=https://web.archive.org/web/20210302143138/https://www.arteris.com/press-releases/altera_arteris_flexnoc_3_june_2013 |url-status=live}}</ref> Other publicly announced licensees of Arteris products include Baidu, Hailo, Tenstorrent, Rebellions, Socionext, Honda, Hyundai Mobis, Microchip, Nio, SiMa.ai, SK Telecom, Kyocera, Renesas, Black Sesame Technologies, GigaDevice, Whalechip, NanoXplore, Nextchip, and Dream Chip.<ref name=NanoXplore>{{Cite web |url=https://www.arteris.com/press-releases/arteris-selected-by-nanoxplore-for-space-applications/ |title=Arteris Selected by NanoXplore for Space Applications |access-date=2025-11-03 |url-status=live}}</ref><ref name=Whalechip>{{Cite web |url=https://www.arteris.com/press-releases/arteris-selected-by-whalechip-for-near-memory-computing-chip/ |title=Arteris Selected by Whalechip for Near-Memory Computing Chip |access-date=2025-11-03 |url-status=live}}</ref><ref name=GigaDevice>{{Cite web |url=https://www.arteris.com/press-releases/arteris-selected-by-gigadevice-for-development-in-next-generation-automotive-soc-with-enhanced-fusa-standards/ |title=Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC with Enhanced FuSa Standards |access-date=2025-11-03 |url-status=live}}</ref><ref name=Nextchip>{{Cite web |url=https://www.arteris.com/press-releases/arteris-selected-by-nextchip-to-accelerate-chip-designs-for-automotive-vision-technology/ |title=Arteris Selected by Nextchip to Accelerate Chip Designs for Automotive Vision Technology |access-date=2025-11-03 |url-status=live}}</ref><ref>{{Cite web |url=https://www.arteris.com/press-releases/arteris-network-on-chip-ip-deployed-in-renesas-next-gen-r-car-automotive-technology/ |title=Arteris Network-on-Chip IP Deployed in Renesas Next-Gen R-Car Automotive Technology |access-date=2026-05-14 |url-status=live}}</ref><ref>{{Cite web |title=Tenstorrent Selects Arteris IP for AI High-Performance Computing and Datacenter RISC-V Chiplets |url=https://www.arteris.com/press-releases/tenstorrent-selects-arteris-ip-ai-high-performance-computing-datacenter-risc-v-chiplets/ |access-date=2023-11-15 |language=en-US}}</ref><ref>{{Cite web |title=Arteris Case Study: Tenstorrent |url=https://www.arteris.com/resources/case-studies/tenstorrent/ |access-date=2025-12-04 |language=en-US}}</ref><ref>{{Cite web |title=Arteris Case Study: Dream Chip |url=https://www.arteris.com/resources/case-studies/dream-chip/ |access-date=2025-12-04 |language=en-US}}</ref>

==Products==

Arteris offers system IP for the acceleration of system-on-chip (SoC) and chiplet development.

===Semiconductor IP=== IP products based on network-on-chip technology include: *FlexGen® Smart Network-on-Chip (NoC) IP<ref>https://www.arteris.com/products/non-coherent-interconnect-ip/flexgen/</ref> *FlexNoC® Network-on-Chip (NoC) Interconnect IP<ref>{{cite web|access-date=2024-06-04 |date= |title=FlexNoC 5 Network-on-Chip (NoC) |publisher=design-reuse.com |url=https://www.design-reuse.com/sip/flexnoc-5-network-on-chip-noc-ip-23688/}}</ref> *FlexWay® Non-coherent NoC IP<ref>https://www.arteris.com/products/non-coherent-interconnect-ip/flexway/</ref> *Ncore™ Cache-Coherent Interconnect IP<ref>{{cite web|access-date=2024-06-04 |date=2024-03-13 |title=Arteris Revs New Version of Its Cache Coherent Interconnect IP |publisher=allaboutcircuits.com |url=https://www.allaboutcircuits.com/news/arteris-revs-new-version-of-its-cache-coherent-interconnect-ip/}}</ref> *CodaCache® Last-Level Cache IP<ref>{{cite web|access-date=2024-06-04 |date=2020-08-04 |title=CodaCache: Helping to Break the Memory Wall |publisher=semiengineering.com |url=https://semiengineering.com/codacache-helping-to-break-the-memory-wall/}}</ref> Optional packages for the above products include: *Safety Option - for functional safety and Reliability Option for FlexNoC and Ncore IP *FlexNoC XL Option - for very large designs

===SoC integration automation=== Software products to accelerate system-on-chip integration, based on the IEEE 1685 IP-XACT standard include: *Magillem® Connectivity - accelerate integration of IP blocks making up complex SoCs *Magillem® Registers - for system memory map *Magillem® Packaging – capture of IP repository in a pivot IEEE Format<ref>https://www.arteris.com/products/packaging/magillem-packaging/</ref>

===Hardware Security Assurance=== Hardware security assurance solutions from Arteris uncover vulnerabilities throughout the design process, enabling semiconductor security and verification teams to address security risks and ensure robust protection for chips in advanced electronic systems: * Hardware security simulation with Cycuity® Radix-S<ref>https://cycuity.com/radix-s/</ref> * Hardware security emulation with Cycuity® Radix-M<ref>https://cycuity.com/radix-m/</ref> * Hardware security static analysis with Cycuity® Radix-ST<ref>https://cycuity.com/radix-st/</ref>

==Solutions==

===Multi-Die Designs=== Arteris provides interconnect and integration solutions for chiplet-based, multi-die architectures that extend beyond traditional monolithic SoCs. These technologies enable higher scalability, improved yield, and flexibility for advanced semiconductor systems.<ref>{{Cite web |url=https://www.arteris.com/solutions/multi-die/ |title=Multi-Die Designs – Arteris |access-date=2025-11-03 |url-status=live}}</ref><ref>{{Cite web |url=https://www.arteris.com/press-releases/arteris-accelerates-ai-driven-silicon-innovation-with-expanded-multi-die-solution/ |title=Arteris Accelerates AI-Driven Silicon Innovation with Expanded Multi-Die Solution |access-date=2025-11-03 |url-status=live}}</ref>

Arteris supports two primary multi-die use cases: *'''Homogeneous Scale-Out''' – uses identical chiplets to build larger systems when single-die designs exceed reticle limits or face yield constraints. Re-using a smaller chiplet design allows cost-effective scaling to larger configurations. *'''Heterogeneous Disaggregation''' – combines different chiplets optimized for specific functions or process nodes. This allows, for example, large SRAM blocks or RF interfaces to be implemented on separate dies using mature, higher-yield technologies.

Arteris’ FlexNoC and Ncore interconnect IP, together with Magillem software tools, help designers create and integrate these multi-die systems for applications in automotive, AI, and high-performance computing.

===Ecosystem===

Arteris goes beyond connecting IP components, they are connecting technology, ideas, and expertise across the ecosystem. Their technology is agnostic and works across the ecosystem. Arteris collaborates with semiconductor IP providers (including ISAs from Arm, RISC-V and x86), EDA vendors (like Synopsys and Cadence), software developers, foundries (like TSMC, Intel Foundry, and Samsung), design houses, research organizations (such as Alibaba DAMO Academy), and standard bodies. The ecosystem value chain ensures interoperability, production readiness, and scalability for successful silicon.<ref>{{Cite web |url=https://www.arteris.com/press-releases/arteris-and-alibaba-damo-academy-extend-partnership-to-accelerate-high-performance-risc-v-soc-designs/ |title=Arteris and Alibaba DAMO Academy Extend Partnership to Accelerate High-Performance RISC-V SoC Designs |access-date=2025-11-03 |url-status=live}}</ref>

==External links== * {{Official website|http://www.arteris.com}}

==References== {{reflist}}

Category:Technology companies established in 2004 Category:Semiconductor companies of the United States Category:2004 establishments in California Category:2021 initial public offerings Category:Companies listed on the Nasdaq