# Zilog Z180 > Mediated Wiki article. Canonical URL: https://mediated.wiki/source/Zilog_Z180 > Markdown URL: https://mediated.wiki/source/Zilog_Z180.md > Source: https://en.wikipedia.org/wiki/Zilog_Z180 > Source revision: 1334780380 > License: Creative Commons Attribution-ShareAlike 4.0 International (https://creativecommons.org/licenses/by-sa/4.0/) 8-bit microprocessor Older Z180 in 68-pin [PLCC](/source/Plastic_leaded_chip_carrier) package (the smaller 80-pin [QFP](/source/QFP) and [LQFP](/source/LQFP) packages are more common today.) Z8S180 in 64-pin [DIP](/source/Dual_in-line_package) The **Zilog Z180** is an [8-bit](/source/8-bit_computing) microprocessor designed by [Zilog](/source/Zilog) as a successor to the [Z80](/source/Zilog_Z80). It is compatible with the large base of software written for the [Z80 instruction set](/source/Z80_instruction_set).[1] The Z180 family adds higher performance and integrated peripheral functions like [clock generator](/source/Clock_generator), 16-bit counters/timers, [interrupt](/source/Interrupt) controller, [wait-state](/source/Wait_state) generators, [serial ports](/source/Serial_port) and a [DMA](/source/Direct_memory_access) controller.[2] It uses separate read and write [strobes](/source/Data_strobe_encoding), sharing similar timings with the Z80 and [Intel](/source/Intel) processors.[3] The on-chip [memory management unit](/source/Memory_management_unit) (MMU) has the capability of addressing up to 1 [MB](/source/Megabyte) of memory. It is possible to configure the Z180 to operate as the [Hitachi HD64180](/source/Hitachi_HD64180).[4] ## Variants Chip Speed (MHz) Timers I/O Comm. Contr. Others Z80180 6, 8, 10 2 N/S CPU 1 MB MMU, 2xDMAs, 2xUARTs Z80181 10 1 16 CPU 1 MB MMU, 2xDMAs, 2xUARTs Z80182 16, 20, 33 2 Clock, Serial, 24 ESCC, CSIO, UART, PIO S180 Megacell, 2xESCC channels, 3*8bit IO, 16550 MIMIC Z80185/Z80195 20, 33 4 7/24 SCC, CSIO, UART Z8L180 20 2 Clock Serial CSIO, UART 1 MB MMU, 2xDMAs, 2xUARTs, 3.3 V Operation Z8L182 20 2 Clock, Serial, 24 ESCC, CSIO, UART, PIO S180 Megacell, 2xESCC channels, 3*8bit IO, 16550 MIMIC, 3.3V operation Z8S180 10, 20, 33 2 Clock Serial UART, DMA 1 MB MMU, 2xDMAs, 2xUARTs Z8S183 10, 20, 33 2 Clock Serial UART, DMA 1 MB MMU, 2xDMAs, 2xUARTs 16550, MIMIC, 3.3V operation[5] Z8S189 10, 20, 33 2 Clock Serial UART, DMA 1 MB MMU, 2xDMAs, 2xUARTs, 3.3V operation[6] ## Z80182 The **[Zilog](/source/Zilog) [Z80182](/source/Z80182)**, introduced in 1997, is an enhanced, faster version of the older [Z80](/source/Zilog_Z80) and is part of the Z180 [microprocessor](/source/Microprocessor) family. It is nicknamed the *Zilog Intelligent Peripheral Controller* (ZIP). It is also fully static (the clock can be halted and no data in the registers will be lost)[*[citation needed](https://en.wikipedia.org/wiki/Wikipedia:Citation_needed)*] and has a low [EMI](/source/Electromagnetic_interference) option that reduces the [slew rate](/source/Slew_rate) of the outputs.[*[citation needed](https://en.wikipedia.org/wiki/Wikipedia:Citation_needed)*] The Z80182 can operate at 33 MHz with an external [oscillator](/source/Electronic_oscillator) for 5-volt operation, or at 20 MHz using the internal oscillator for 3.3-volt operation.[7] ## References 1. **[^](#cite_ref-1)** Ganssle, Jack (1992). ["The Z80 Lives!"](http://www.z80.info/z80lives.htm). [Archived](https://web.archive.org/web/20231220144616/http://www.z80.info/z80lives.htm) from the original on 2023-12-20. Retrieved 2009-07-22. The designers picked an architecture compatible with the Z80, giving Z80 users a completely software compatible upgrade path 1. **[^](#cite_ref-2)** Jack G. Ganssle. (1992). *The art of programming embedded systems*. San Diego: Academic Press. p. 13. [ISBN](/source/ISBN_(identifier)) [978-0-12-274880-6](https://en.wikipedia.org/wiki/Special:BookSources/978-0-12-274880-6). 1. **[^](#cite_ref-3)** Stuart R. Ball. (2002). [*Embedded microprocessor systems real world design*](https://archive.org/details/embeddedmicropro00ball_775). Amsterdam: Newnes. p. [34](https://archive.org/details/embeddedmicropro00ball_775/page/n48). [ISBN](/source/ISBN_(identifier)) [978-0-7506-7534-5](https://en.wikipedia.org/wiki/Special:BookSources/978-0-7506-7534-5). 1. **[^](#cite_ref-4)** ["Z80 Application Note: Migrating from the Hitachi HD64180 to ZiLOG's Z80180, page 7 Summary"](http://www.zilog.com/appnotes_download.php?FromPage=DirectLink&dn=AN0026&ft=Application%20Note&f=YUhSMGNEb3ZMM2QzZHk1NmFXeHZaeTVqYjIwdlpHOWpjeTk2TVRnd0wyRndjRzV2ZEdWekwyaGtOalF4T0RBdGJXbG5jbUYwYVc5dUxuQmtaZz09). *zilog.com/appnotes_download.php*. Zilog Inc. [Archived](https://web.archive.org/web/20191212223553/http://www.zilog.com/appnotes_download.php?FromPage=DirectLink&dn=AN0026&ft=Application%20Note&f=YUhSMGNEb3ZMM2QzZHk1NmFXeHZaeTVqYjIwdlpHOWpjeTk2TVRnd0wyRndjRzV2ZEdWekwyaGtOalF4T0RBdGJXbG5jbUYwYVc5dUxuQmtaZz09) from the original on December 12, 2019. Retrieved May 20, 2019. 1. **[^](#cite_ref-5)** ["Mixed-Signal Z183 Webserver"](http://www.ic72.com/pdf_file/z/193929.pdf) (PDF). [Archived](https://web.archive.org/web/20240415025827/http://www.ic72.com/pdf_file/z/193929.pdf) (PDF) from the original on 2024-04-15. Retrieved 2023-08-22. 1. **[^](#cite_ref-6)** ["Www.Alldatasheet.Com"](http://datasheets.chipdb.org/Zilog/Z180/Z80189.pdf) (PDF). [Archived](https://web.archive.org/web/20190210131032/http://datasheets.chipdb.org/Zilog/Z180/Z80189.pdf) (PDF) from the original on 2019-02-10. Retrieved 2019-08-18. 1. **[^](#cite_ref-7)** "CPU Control Register". *Z80182/Z8L182 Zilog Intelligent Peripheral Controller Product Specification*. [San Jose, California](/source/San_Jose%2C_California): [Zilog](/source/Zilog). 1997. pp. 3–48. ## Further reading - Harston, J.G. (1997-09-09). ["Z180 Opcode Map"](https://web.archive.org/web/20081122031241/http://www.mdfs.net/Docs/Comp/Z180/OpCodeMap). Archived from [the original](http://mdfs.net/Docs/Comp/Z180/OpCodeMap) on 2008-11-22. Retrieved 2009-07-15. - Harston, J.G. (1998-04-15). ["Full HD64180/Z180 Opcode List"](https://web.archive.org/web/20080907151624/http://www.mdfs.net/Docs/Comp/Z180/OpList). Archived from [the original](http://mdfs.net/Docs/Comp/Z180/OpList) on 2008-09-07. Retrieved 2009-07-15. ## External links - ["Z80180 Microprocessor Unit Product Specification"](http://www.zilog.com/docs/z180/ps0140.pdf) (PDF). [San Jose, California](/source/San_Jose%2C_California): [Zilog](/source/Zilog). November 2006. Retrieved 2009-07-15. - ["Z80S180/Z80L180 Product Specification"](http://www.zilog.com/docs/z180/z8s180ps.pdf) (PDF). [San Jose, California](/source/San_Jose%2C_California): [Zilog](/source/Zilog). 2000. Retrieved 2009-07-15. - ["Z8S180 SL1960 Product Specification"](http://www.zilog.com/docs/z180/dc4077.pdf) (PDF). [San Jose, California](/source/San_Jose%2C_California): [Zilog](/source/Zilog). 1998. Retrieved 2009-07-15. - ["Z8018x MPU Family User Manual"](http://www.zilog.com/docs/z180/um0050.pdf) (PDF). [San Jose, California](/source/San_Jose%2C_California): [Zilog](/source/Zilog). 2003. Retrieved 2009-07-15. v t e Zilog Products Z80 series Z80 Z180 Z280 Z800 Z380 eZ80 Z8000 series Z8000 Z80000 Microcontroller Z8 Z8 Encore! Z80182 Encore! 32 Operating systems Z80-RIO Related Z80 compatibles ASCII R800 Hitachi HD64180, Zilog Z64180 NEC µPD780C Sharp LH0080 Toshiba TLCS-870 Rabbit 2000 КР1858ВМ1 U880 MMN80CPU People Federico Faggin Ralph Ungermann Masatoshi Shima --- Adapted from the Wikipedia article [Zilog Z180](https://en.wikipedia.org/wiki/Zilog_Z180) by Wikipedia contributors ([contributor history](https://en.wikipedia.org/wiki/Zilog_Z180?action=history)). Available under [Creative Commons Attribution-ShareAlike 4.0 International](https://creativecommons.org/licenses/by-sa/4.0/). Changes may have been made.