# Zero register

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{{Short description|CPU register that is always zero}}
A '''zero register''' is a [processor register](/source/processor_register) that always returns the value zero and has no effect when it is written to. It is found in [instruction set architecture](/source/instruction_set_architecture)s including the [CDC 6600](/source/CDC_6600), [MIPS](/source/MIPS_architecture), [SPARC](/source/SPARC), [Alpha](/source/DEC_Alpha), [ARM64](/source/AArch64), and [RISC-V](/source/RISC-V), among others.

Zero appears as a constant in many instructions, notably "branch if zero", and optimizing these instructions can have a positive benefit on performance. Some architectures accomplish this with dedicated [opcode](/source/opcode)s, specialized variations of their basic instructions. Implementing these requires additional logic in the [instruction decoder](/source/instruction_decoder). The zero register can accomplish the same effect without requiring new opcodes, although at the cost of dedicating a register to this feature, which may have negative impact for architectures with limited number of registers. The rationale given for including it in RISC-V is that "Dedicating a register to zero is surprisingly a large factor in simplifying the RISC-V ISA."<ref>{{Cite book |last=Patterson |first=David |title=The RISC-V Reader: An Open Architecture Atlas |edition=Beta Ed., 0.0.1 |page=18}}</ref>

The [x86](/source/x86) architecture has no zero register, while [ARM](/source/ARM_architecture_family) added a zero register for ARM64.

Some instruction set architectures, such as [System/360](/source/System%2F360) through [z/Architecture](/source/z%2FArchitecture) and [POWER](/source/IBM_POWER_architecture)/[PowerPC](/source/PowerPC)/[Power ISA](/source/Power_ISA) have registers that are not always zero, but that are zero when the register is used as an [index register](/source/index_register).

==References==
{{Reflist}}
* {{Cite web |last=Mashey |first=John |author-link=John Mashey |date=8 August 1998 |title=Top 10 Mistakes in Computer Architecture |url=https://yarchive.net/comp/zero_register.html}}
* {{Cite web |title=RISC-V Spec |url=https://riscv.org/wp-content/uploads/2015/01/riscv-calling.pdf}}

Category:Digital registers

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Adapted from the Wikipedia article [Zero register](https://en.wikipedia.org/wiki/Zero_register) by Wikipedia contributors ([contributor history](https://en.wikipedia.org/wiki/Zero_register?action=history)). Available under [Creative Commons Attribution-ShareAlike 4.0 International](https://creativecommons.org/licenses/by-sa/4.0/). Changes may have been made.