# Video Coding Engine

> Mediated Wiki article. Canonical URL: https://mediated.wiki/source/Video_Coding_Engine
> Markdown URL: https://mediated.wiki/source/Video_Coding_Engine.md
> Source: https://en.wikipedia.org/wiki/Video_Coding_Engine
> Source revision: 1320871554
> License: Creative Commons Attribution-ShareAlike 4.0 International (https://creativecommons.org/licenses/by-sa/4.0/)

AMD hardware accelerator for encoding MP4 H.264 videos, built into AMD GPU's

**Video Code Engine** (**VCE**; earlier referred to as **Video Coding Engine**,[1] **Video Compression Engine**[2] or **Video Codec Engine**[3] in official documentation) is [AMD](/source/AMD)'s [video encoding](/source/Video_encoding) [application-specific integrated circuit](/source/Application-specific_integrated_circuit) implementing the [video codec](/source/Video_codec) [H.264/MPEG-4 AVC](/source/H.264%2FMPEG-4_AVC). Since 2012 it was integrated into all of their [GPUs](/source/List_of_AMD_graphics_processing_units) and [APUs](/source/List_of_AMD_accelerated_processing_units) except Oland.

VCE was introduced with the [Radeon HD 7000 series](/source/Radeon_HD_7000_series) on 22 December 2011.[4][5][6] VCE occupies a considerable amount of the [die](/source/Die_(integrated_circuit)) surface at the time of its introduction[7] and is not to be confused with AMD's [Unified Video Decoder](/source/Unified_Video_Decoder) (UVD).

As of [AMD Raven Ridge](/source/AMD_Raven_Ridge) (released January 2018), UVD and VCE were succeeded by [Video Core Next](/source/Video_Core_Next) (VCN).

## Overview

In *"full-fixed mode"* the entire computation is done by the fixed-function VCE unit. Full-fixed mode can be accessed through the OpenMAX IL API.

The entropy encoding block of the VCE ASIC is also separately accessible, enabling *"hybrid mode"*. In *"hybrid mode"* most of the computation is done by the 3D engine of the GPU. Using [AMD's Accelerated Parallel Programming SDK](/source/AMD_APP_SDK) and [OpenCL](/source/OpenCL) developers can create hybrid encoders that pair custom motion estimation, inverse discrete cosine transform and motion compensation with the hardware entropy encoding to achieve faster than real-time encoding.

The handling of video data involves computation of [data compression](/source/Data_compression) algorithms and possibly of [video processing](/source/Video_processing) algorithms. As the template [compression methods](https://en.wikipedia.org/wiki/Template:Compression_methods) shows, lossy video compression algorithms involve the steps: [motion estimation](/source/Motion_compensation) (ME), [discrete cosine transform](/source/Discrete_cosine_transform) (DCT), and [entropy encoding](/source/Entropy_encoding) (EC).

AMD Video Code Engine (VCE) is a full hardware implementation of the video codec H.264/MPEG-4 AVC. It is capable of delivering 1080p at 60 frames/sec. Because its entropy encoding block is also a separately accessible Video Codec Engine, it can be operated in two modes: full-fixed mode and hybrid mode.[8][9]

By employing [AMD APP SDK](/source/AMD_APP_SDK), available for Linux and Microsoft Windows, developers can create hybrid encoders that pair custom motion estimation, inverse discrete cosine transform and motion compensation with the hardware entropy encoding to achieve faster than real-time encoding. In hybrid mode, only the entropy encoding block of the VCE unit is used, while the remaining computation is offloaded to the 3D engine of the GPU, so the computing scales with the number of available compute units (CUs).

### VCE 1.0

VCE[1] Version 1.0 supports H.264 YUV420 (I & P frames), H.264 SVC Temporal Encode VCE, and *Display Encode Mode* (DEM).

It can be found on:

- [Piledriver](/source/Piledriver_(microarchitecture))-based - Trinity APUs (Ax-5xxx, e.g. A10-5800K) - Richland APUs (Ax-6xxx, e.g. A10-6800K)

- GPUs of the Southern Islands generation (GCN1: CAYMAN, ARUBA (Trinity/Richland), CAPE VERDE, PITCAIRN, TAHITI). These are - Radeon HD 7700 series (except HD 7790 with VCE 2.0) - Radeon HD 7800 series - Radeon HD 7900 series - Radeon HD 8570 to 8990 (except HD 8770 with VCE 2.0) - Radeon R7 250E, 250X, 265 / R9 270, 270X, 280, 280X - Radeon R7 360, 370, 455 / R9 370, 370X - Mobile Radeon HD 77x0M to HD 7970M - Mobile Radeon HD 8000-Series - Mobile Radeon Rx M2xx Series (except R9 M280X with VCE 2.0 and R9 M295X with VCE 3.0) - Mobile Radeon R5 M330 to R9 M390 - FirePro cards with 1st Generation GCN (GCN1) (Except W2100, which is Oland XT)

### VCE 2.0

Compared to the first version, VCE 2.0 adds H.264 YUV444 (I-Frames), B-frames for H.264 YUV420, and improvements to the DEM (Display Encode Mode), which results in a better encoding quality.

It can be found on:

- [Steamroller](/source/Steamroller_(microarchitecture))-based - Kaveri APUs (Ax-7xxx, e.g. A10-7850K) - Godavari APUs (Ax-7xxx, e.g. A10-7890K)

- [Jaguar](/source/Jaguar_(microarchitecture))-based - Kabini APUs (e.g. Athlon 5350, Sempron 2650) - Temash APUs (e.g. A6-1450, A4-1200)

- [Puma](/source/Puma_(microarchitecture))-based - Beema and Mullins

- GPUs of the Sea Islands generation as well Bonaire or Hawaii GPUs (2nd Generation Graphics Core Next), such as - Radeon HD 7790, 8770 - Radeon R7 260, 260X / R9 290, 290X, 295X2 - Radeon R7 360 / R9 390, 390X - Mobile Radeon R9 M280X - Mobile Radeon R9 M385, M385X - Mobile Radeon R9 M470, M470X - FirePro W4300, W5100, W8100, W9100, S9100, S9150, S9170 - Mobile FirePro M6100, W6150M, W6170M

### VCE 3.0

Video Code Engine 3.0 (VCE 3.0) technology features a new high-quality video scaling and - since version 3.4 - [High Efficiency Video Coding](/source/High_Efficiency_Video_Coding) (HEVC/H.265).[10][11]

It, together with [UVD](/source/Unified_Video_Decoder) 6.0, can be found on 3rd generation of Graphics Core Next (GCN3) with "Tonga" and "Fiji" (VCE 3.0) based graphics controller hardware, which is now used [AMD Radeon Rx 300 series](/source/AMD_Radeon_Rx_300_series) (Pirate Islands GPU family) and VCE 3.4 by actual [AMD Radeon Rx 400 series](/source/AMD_Radeon_Rx_400_series) and [AMD Radeon 500 series](/source/AMD_Radeon_500_series) (both Polaris GPU family).

- Tonga: Radeon R9 285, 380, 380X; Mobile Radeon R9 M390X, M395, M395X, M485X

- Tonga XT: FirePro W7100, S7100X, S7150, S7150 X2

- Fiji: Radeon R9 Fury, Fury X, Nano; Radeon Pro Duo (2016); FirePro S9300, W7170M; Instinct MI8

- Polaris: RX 460, 470, 480; RX 550, 560, 570, 580; Radeon Pro Duo (2017)

AMD's [Carrizo](/source/List_of_AMD_accelerated_processing_units#"Carrizo"_(2016)) platform features VCE 3.1, retaining the same capabilities as the VCE found in "Fiji" and "Tonga".[12]

[Stoney Ridge](/source/List_of_AMD_accelerated_processing_unit_microprocessors#"Stoney_Ridge"_(2016)) features a cut down version of VCE 3.4 without HEVC/H.265 encoding and is accompanied by a UVD 6.2 engine.[13]

VCE 3.0 removes support for H.264 B-frames.[14]

### VCE 4.0

The Video Code Engine 4.0 encoder and UVD 7.0 decoder are included in the Vega-based GPUs.[15][16]

#### VCE 4.1

AMD's Vega20 GPU, present in the Instinct Mi50, Instinct Mi60 and Radeon VII cards, include VCE 4.1 and two UVD 7.2 instances.[17][18]

### Feature overview

#### APUs

The following table shows features of [AMD](/source/AMD)'s processors with 3D graphics, including [APUs](/source/AMD_APU) (see also: [List of AMD processors with 3D graphics](/source/List_of_AMD_processors_with_3D_graphics)).

[ [VisualEditor](https://en.wikipedia.org/w/index.php?title=Template:Features_of_AMD_Processors_with_3D_Graphics&veaction=edit) ]
- [view](https://en.wikipedia.org/wiki/Template:Features_of_AMD_Processors_with_3D_Graphics)
- [talk](/source/Template_talk%3AFeatures_of_AMD_Processors_with_3D_Graphics)
- [edit](https://en.wikipedia.org/wiki/Special:EditPage/Template:Features_of_AMD_Processors_with_3D_Graphics)

Platform High, standard and low power Low and ultra-low power Codename Server Basic Toronto Micro Kyoto Desktop Performance Raphael Phoenix Mainstream Llano Trinity Richland Kaveri Kaveri Refresh (Godavari) Carrizo Bristol Ridge Raven Ridge Picasso Renoir Cezanne Entry Basic Kabini Dalí Mobile Performance Renoir Cezanne Rembrandt Dragon Range Mainstream Llano Trinity Richland Kaveri Carrizo Bristol Ridge Raven Ridge Picasso Renoir Lucienne Cezanne Barceló Phoenix Entry Dalí Mendocino Basic Desna, Ontario, Zacate Kabini, Temash Beema, Mullins Carrizo-L Stoney Ridge Pollock Embedded Trinity Bald Eagle Merlin Falcon, Brown Falcon Great Horned Owl Grey Hawk Ontario, Zacate Kabini Steppe Eagle, Crowned Eagle, LX-Family Prairie Falcon Banded Kestrel River Hawk Released Aug 2011 Oct 2012 Jun 2013 Jan 2014 2015 Jun 2015 Jun 2016 Oct 2017 Jan 2019 Mar 2020 Jan 2021 Jan 2022 Sep 2022 Jan 2023 Jan 2011 May 2013 Apr 2014 May 2015 Feb 2016 Apr 2019 Jul 2020 Jun 2022 Nov 2022 CPU microarchitecture K10 Piledriver Steamroller Excavator "Excavator+"[19] Zen Zen+ Zen 2 Zen 3 Zen 3+ Zen 4 Bobcat Jaguar Puma Puma+[20] "Excavator+" Zen Zen+ "Zen 2+" ISA x86-64 v1 x86-64 v2 x86-64 v3 x86-64 v4 x86-64 v1 x86-64 v2 x86-64 v3 Socket Desktop Performance —N/a AM5 —N/a —N/a Mainstream —N/a AM4 —N/a —N/a Entry FM1 FM2 FM2+ FM2+[a], AM4 AM4 —N/a Basic —N/a —N/a AM1 —N/a FP5 —N/a Other FS1 FS1+, FP2 FP3 FP4 FP5 FP6 FP7 FL1 FP7 FP7r2 FP8 FT1 FT3 FT3b FP4 FP5 FT5 FP5 FT6 PCI Express version 2.0 3.0 4.0 5.0 4.0 2.0 3.0 CXL —N/a —N/a Fab. (nm) GF 32SHP (HKMG SOI) GF 28SHP (HKMG bulk) GF 14LPP (FinFET bulk) GF 12LP (FinFET bulk) TSMC N7 (FinFET bulk) TSMC N6 (FinFET bulk) CCD: TSMC N5 (FinFET bulk) cIOD: TSMC N6 (FinFET bulk) TSMC 4nm (FinFET bulk) TSMC N40 (bulk) TSMC N28 (HKMG bulk) GF 28SHP (HKMG bulk) GF 14LPP (FinFET bulk) GF 12LP (FinFET bulk) TSMC N6 (FinFET bulk) Die area (mm2) 228 246 245 245 250 210[21] 156 180 210 CCD: (2x) 70 cIOD: 122 178 75 (+ 28 FCH) 107 ? 125 149 ~100 Min TDP (W) 35 17 12 10 15 65 35 4.5 4 3.95 10 6 12 8 Max APU TDP (W) 100 95 65 45 170 54 18 25 6 54 15 Max stock APU base clock (GHz) 3 3.8 4.1 4.1 3.7 3.8 3.6 3.7 3.8 4.0 3.3 4.7 4.3 1.75 2.2 2 2.2 3.2 2.6 1.2 3.35 2.8 Max APUs per node[b] 1 1 Max core dies per CPU 1 2 1 1 Max CCX per core die 1 2 1 1 Max cores per CCX 4 8 2 4 2 4 Max CPU[c] cores per APU 4 8 16 8 2 4 2 4 Max threads per CPU core 1 2 1 2 Integer pipeline structure 3+3 2+2 4+2 4+2+1 1+3+3+1+2 1+1+1+1 2+2 4+2 4+2+1 i386, i486, i586, CMOV, NOPL, i686, PAE, NX bit, CMPXCHG16B, AMD-V, RVI, ABM, and 64-bit LAHF/SAHF IOMMU[d] —N/a v2 v1 v2 BMI1, AES-NI, CLMUL, and F16C —N/a MOVBE —N/a AVIC, BMI2, RDRAND, and MWAITX/MONITORX —N/a SME[e], TSME[e], ADX, SHA, RDSEED, SMAP, SMEP, XSAVEC, XSAVES, XRSTORS, CLFLUSHOPT, CLZERO, and PTE Coalescing —N/a —N/a GMET, WBNOINVD, CLWB, QOS, PQE-BW, RDPID, RDPRU, and MCOMMIT —N/a —N/a MPK, VAES —N/a —N/a SGX —N/a —N/a FPUs per core 1 0.5 1 1 0.5 1 Pipes per FPU 2 2 FPU pipe width 128-bit 256-bit 80-bit 128-bit 256-bit CPU instruction set SIMD level SSE4a[f] AVX AVX2 AVX-512 SSSE3 AVX AVX2 3DNow! 3DNow!+ —N/a —N/a PREFETCH/PREFETCHW GFNI —N/a —N/a AMX —N/a FMA4, LWP, TBM, and XOP —N/a —N/a —N/a —N/a FMA3 AMD XDNA —N/a —N/a L1 data cache per core (KiB) 64 16 32 32 L1 data cache associativity (ways) 2 4 8 8 L1 instruction caches per core 1 0.5 1 1 0.5 1 Max APU total L1 instruction cache (KiB) 256 128 192 256 512 256 64 128 96 128 L1 instruction cache associativity (ways) 2 3 4 8 2 3 4 8 L2 caches per core 1 0.5 1 1 0.5 1 Max APU total L2 cache (MiB) 4 2 4 16 1 2 1 2 L2 cache associativity (ways) 16 8 16 8 Max on-die L3 cache per CCX (MiB) —N/a 4 16 32 —N/a 4 Max 3D V-Cache per CCD (MiB) —N/a 64 —N/a —N/a Max total in-CCD L3 cache per APU (MiB) 4 8 16 64 4 Max. total 3D V-Cache per APU (MiB) —N/a 64 —N/a —N/a Max. board L3 cache per APU (MiB) —N/a —N/a Max total L3 cache per APU (MiB) 4 8 16 128 4 APU L3 cache associativity (ways) 16 16 L3 cache scheme Victim Victim Max. L4 cache —N/a —N/a Max stock DRAM support DDR3-1866 DDR3-2133 DDR3-2133, DDR4-2400 DDR4-2400 DDR4-2933 DDR4-3200, LPDDR4-4266 DDR5-4800, LPDDR5-6400 DDR5-5200 DDR5-5600, LPDDR5x-7500 DDR3L-1333 DDR3L-1600 DDR3L-1866 DDR3-1866, DDR4-2400 DDR4-2400 DDR4-1600 DDR4-3200 LPDDR5-5500 Max DRAM channels per APU 2 1 2 1 2 Max stock DRAM bandwidth (GB/s) per APU 29.866 34.132 38.400 46.932 68.256 102.400 83.200 120.000 10.666 12.800 14.933 19.200 38.400 12.800 51.200 88.000 GPU microarchitecture TeraScale 2 (VLIW5) TeraScale 3 (VLIW4) GCN 2nd gen GCN 3rd gen GCN 5th gen[22] RDNA 2 RDNA 3 TeraScale 2 (VLIW5) GCN 2nd gen GCN 3rd gen[22] GCN 5th gen RDNA 2 GPU instruction set TeraScale instruction set GCN instruction set RDNA instruction set TeraScale instruction set GCN instruction set RDNA instruction set Max stock GPU base clock (MHz) 600 800 844 866 1108 1250 1400 2100 2400 400 538 600 ? 847 900 1200 600 1300 1900 Max stock GPU base GFLOPS[g] 480 614.4 648.1 886.7 1134.5 1760 1971.2 2150.4 3686.4 102.4 86 ? ? ? 345.6 460.8 230.4 1331.2 486.4 3D engine[h] Up to 400:20:8 Up to 384:24:6 Up to 512:32:8 Up to 704:44:16[23] Up to 512:32:8 768:48:8 128:8:4 80:8:4 128:8:4 Up to 192:12:8 Up to 192:12:4 192:12:4 Up to 512:?:? 128:?:? IOMMUv1 IOMMUv2 IOMMUv1 ? IOMMUv2 Video decoder UVD 3.0 UVD 4.2 UVD 6.0 VCN 1.0[24] VCN 2.1[25] VCN 2.2[25] VCN 3.1 ? UVD 3.0 UVD 4.0 UVD 4.2 UVD 6.2 VCN 1.0 VCN 3.1 Video encoder —N/a VCE 1.0 VCE 2.0 VCE 3.1 —N/a VCE 2.0 VCE 3.4 AMD Fluid Motion GPU power saving PowerPlay PowerTune PowerPlay PowerTune[26] TrueAudio —N/a [27] ? —N/a FreeSync 1 2 1 2 HDCP[i] ? 1.4 2.2 2.3 ? 1.4 2.2 2.3 PlayReady[i] —N/a 3.0 not yet —N/a 3.0 not yet Supported displays[j] 2–3 2–4 3 3 (desktop) 4 (mobile, embedded) 4 2 3 4 4 /drm/radeon[k][29][30] —N/a —N/a /drm/amdgpu[k][31] —N/a [32] —N/a [32]

1. **[^](#cite_ref-21)** For FM2+ Excavator models: A8-7680, A6-7480 & Athlon X4 845.

1. **[^](#cite_ref-nodedef_23-0)** A PC would be one node.

1. **[^](#cite_ref-apudef_24-0)** An APU combines a CPU and a GPU. Both have cores.

1. **[^](#cite_ref-iommubios_25-0)** Requires firmware support.

1. ^ [***a***](#cite_ref-firmware_26-0) [***b***](#cite_ref-firmware_26-1) Requires firmware support.

1. **[^](#cite_ref-sse4a_27-0)** No SSE4. No SSSE3.

1. **[^](#cite_ref-SFLOPS_29-0)** [Single-precision](/source/Single-precision_floating-point_format) performance is calculated from the base (or boost) core clock speed based on a [FMA](/source/Fused_multiply%E2%80%93add) operation.

1. **[^](#cite_ref-30)** [Unified shaders](/source/Unified_shader_model) : [texture mapping units](/source/Texture_mapping_unit) : [render output units](/source/Render_output_unit)

1. ^ [***a***](#cite_ref-DRM_36-0) [***b***](#cite_ref-DRM_36-1) To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup.

1. **[^](#cite_ref-38)** To feed more than two displays, the additional panels must have native [DisplayPort](/source/DisplayPort) support.[28] Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed.

1. ^ [***a***](#cite_ref-drm_39-0) [***b***](#cite_ref-drm_39-1) DRM ([Direct Rendering Manager](/source/Direct_Rendering_Manager)) is a component of the Linux kernel. Support in this table refers to the most current version.

#### GPUs

The following table shows features of [AMD](/source/Advanced_Micro_Devices)/[ATI](/source/ATI_Technologies)'s [GPUs](/source/Graphics_processing_unit) (see also: [List of AMD graphics processing units](/source/List_of_AMD_graphics_processing_units)).

[ [VisualEditor](https://en.wikipedia.org/w/index.php?title=Template:AMD_GPU_features&veaction=edit) ]
- [view](https://en.wikipedia.org/wiki/Template:AMD_GPU_features)
- [talk](/source/Template_talk%3AAMD_GPU_features)
- [edit](https://en.wikipedia.org/wiki/Special:EditPage/Template:AMD_GPU_features)

Name of GPU series Wonder Mach 3D Rage Rage Pro Rage 128 R100 R200 R300 R400 R500 R600 RV670 R700 Evergreen Northern Islands Southern Islands Sea Islands Volcanic Islands Arctic Islands/Polaris Vega Navi 1x Navi 2x Navi 3x Navi 4x Released 1986 1991 Apr 1996 Mar 1997 Aug 1998 Apr 2000 Aug 2001 Sep 2002 May 2004 Oct 2005 May 2007 Nov 2007 Jun 2008 Sep 2009 Oct 2010 Dec 2010 Jan 2012 Sep 2013 Jun 2015 Jun 2016, Apr 2017, Aug 2019 Jun 2017, Feb 2019 Jul 2019 Nov 2020 Dec 2022 Feb 2025 Marketing Name Wonder Mach 3D Rage Rage Pro Rage 128 Radeon 7000 Radeon 8000 Radeon 9000 Radeon X700/X800 Radeon X1000 Radeon HD 2000 Radeon HD 3000 Radeon HD 4000 Radeon HD 5000 Radeon HD 6000 Radeon HD 7000 Radeon 200 Radeon 300 Radeon 400/500/600 Radeon RX Vega, Radeon VII Radeon RX 5000 Radeon RX 6000 Radeon RX 7000 Radeon RX 9000 AMD support Kind 2D 3D Instruction set architecture Not publicly known TeraScale instruction set GCN instruction set RDNA instruction set Microarchitecture Not publicly known GFX1 GFX2 TeraScale 1 (VLIW5) (GFX3) TeraScale 2 (VLIW5) (GFX4) TeraScale 2 (VLIW5) up to 68xx (GFX4) TeraScale 3 (VLIW4) in 69xx [33][34] (GFX5) GCN 1st gen (GFX6) GCN 2nd gen (GFX7) GCN 3rd gen (GFX8) GCN 4th gen (GFX8) GCN 5th gen (GFX9) RDNA (GFX10.1) RDNA 2 (GFX10.3) RDNA 3 (GFX11) RDNA 4 (GFX12) Type Fixed pipeline[a] Programmable pixel & vertex pipelines Unified shader model Direct3D —N/a 5.0 6.0 7.0 8.1 9.0 11 (9_2) 9.0b 11 (9_2) 9.0c 11 (9_3) 10.0 11 (10_0) 10.1 11 (10_1) 11 (11_0) 11 (11_1) 12 (11_1) 11 (12_0) 12 (12_0) 11 (12_1) 12 (12_1) 11 (12_1) 12 (12_2) Shader model —N/a 1.4 2.0+ 2.0b 3.0 4.0 4.1 5.0 5.1 5.1 6.5 6.7 6.8 OpenGL —N/a 1.1 1.2 1.3 1.5[b][35] 3.3 4.5 (Windows), 4.6 (Linux Mesa 25.2+)[36] 4.6[37][c] Vulkan —N/a 1.1[c][d] 1.3[38][39][e] 1.4[40] OpenCL —N/a Close to Metal 1.1 (not supported by Mesa) 1.2+ (on Linux: 1.1+ (no Image support on Clover, with Rusticl) with Mesa, 1.2+ on GCN 1.Gen) 2.0+ (Adrenalin driver on Win 7+) (on Linux ROCm, Mesa 1.2+ (no support in Clover, only Rusticl, Mesa, 2.0+ and 3.0 with AMD drivers or AMD ROCm), 5th gen: 2.2 win 10+ and Linux RocM 5.0+ 2.2+ and 3.0 Windows 8.1+ and Linux ROCm 5.0+ (Mesa Rusticl 1.2+ and 3.0 (2.1+ and 2.2+))[41][42][43] HSA / ROCm —N/a ? Video decoding ASIC —N/a Avivo/UVD UVD+ UVD 2 UVD 2.2 UVD 3 UVD 4 UVD 4.2 UVD 5.0 or 6.0 UVD 6.3 UVD 7 [15][f] VCN 2.0 [15][f] VCN 3.0 [44] VCN 4.0 VCN 5.0 Video encoding ASIC —N/a VCE 1.0 VCE 2.0 VCE 3.0 or 3.1 VCE 3.4 VCE 4.0 [15][f] Fluid Motion [g] ? Power saving ? PowerPlay PowerTune PowerTune & ZeroCore Power ? TrueAudio —N/a Via dedicated DSP Via shaders FreeSync —N/a 1 2 HDCP[h] —N/a ? 1.4 2.2 2.3 [45] PlayReady[h] —N/a 3.0 3.0 Supported displays[i] 1–2 2 2–6 ? 4 Max. resolution ? 2–6 × 2560×1600 2–6 × 4096×2160 @ 30 Hz 2–6 × 5120×2880 @ 60 Hz 3 × 7680×4320 @ 60 Hz [46] 7680×4320 @ 60 Hz PowerColor 7680x4320 @165 Hz 7680x4320 /drm/radeon[j] —N/a /drm/amdgpu[j] —N/a Kernel 6.19+ [47]

1. **[^](#cite_ref-r100_shader_46-0)** The Radeon R100 Series has programmable pixel shaders, but do not fully comply with DirectX 8 or Pixel Shader 1.0. See article on [R100's pixel shaders](/source/Radeon_R100_series#R100's_pixel_shaders).

1. **[^](#cite_ref-nonpot_47-0)** R300, R400 and R500 based cards do not fully comply with OpenGL 2+ as the hardware does not support all types of non-power of two (NPOT) textures.

1. ^ [***a***](#cite_ref-nofp64_51-0) [***b***](#cite_ref-nofp64_51-1) OpenGL 4+ compliance requires supporting FP64 shaders and these are emulated on some TeraScale chips using 32-bit hardware.

1. **[^](#cite_ref-vulkantheo_52-0)** Vulkan support is theoretically possible but has not been implemented in a stable driver.

1. **[^](#cite_ref-vulkandepend_55-0)** Vulkan support in Linux relies on the AMDgpu kernel driver, the radeon driver does not support Vulkan.

1. ^ [***a***](#cite_ref-vcn_60-0) [***b***](#cite_ref-vcn_60-1) [***c***](#cite_ref-vcn_60-2) The UVD and VCE were replaced by the Video Core Next (VCN) ASIC in the [Raven Ridge](/source/Ryzen#Raven_Ridge) APU implementation of Vega.

1. **[^](#cite_ref-FliudMotion_62-0)** Video processing for video frame rate interpolation technique. In Windows it works as a DirectShow filter in your player. In Linux, there is no support on the part of drivers and / or community.

1. ^ [***a***](#cite_ref-DRM_63-0) [***b***](#cite_ref-DRM_63-1) To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup.

1. **[^](#cite_ref-max_displays_65-0)** More displays may be supported with native [DisplayPort](/source/DisplayPort) connections, or splitting the maximum resolution between multiple monitors with active converters.

1. ^ [***a***](#cite_ref-drm_67-0) [***b***](#cite_ref-drm_67-1) DRM ([Direct Rendering Manager](/source/Direct_Rendering_Manager)) is a component of the Linux kernel. [AMDgpu](/source/AMDgpu_(Linux_kernel_module)) is the Linux kernel module. Support in this table refers to the most current version.

## Operating system support

The VCE SIP core needs to be supported by the [device driver](/source/Device_driver). The device driver provides one or multiple [interfaces](/source/Application_programming_interface), e. g. [OpenMAX IL](/source/OpenMAX_IL). One of these interfaces is then used by end-user software, like [GStreamer](/source/GStreamer) or [HandBrake](/source/HandBrake) (HandBrake rejected VCE support in December 2016,[48] but added it in December 2018[49]), to access the VCE hardware and make use of it.

AMD's [proprietary](/source/Proprietary_software) device driver [AMD Catalyst](/source/AMD_Catalyst) is available for multiple operating systems and support for VCE was added to it[*[citation needed](https://en.wikipedia.org/wiki/Wikipedia:Citation_needed)*]. Additionally, a [free device driver](/source/Free_and_open-source_graphics_device_driver#ATI/AMD) is available. This driver also supports the VCE hardware.

### Linux

Main articles: [AMD Catalyst for Linux](/source/AMD_Catalyst) and [Free Radeon driver](/source/Free_and_open-source_graphics_device_driver#ATI/AMD)

Support for the VCE [ASIC](/source/Application-specific_integrated_circuit) is contained in the [Linux kernel](/source/Linux_kernel) device driver *amdgpu*.

- Initial VCE support was added on 4 February 2014 by Christian König of AMD to the free radeon driver.[50]

- [Gallium3D state tracker](/source/Gallium3D) for [OpenMAX](/source/OpenMAX) was added 24 October 2013 to [Mesa 3D](/source/Mesa_3D).[51]

- The [free and open-source Radeon driver](/source/Free_and_open-source_graphics_device_driver#ATI/AMD) was adapted to use OpenMAX with the [GStreamer](/source/GStreamer) OpenMAX (gst-omx) support for exposing the VCE video encode engine.[52]

- AMD employee Leo Liu implemented [h264 level support](/source/H.264%2FMPEG-4_AVC#Levels) into the Mesa 3D state tracker.[53]

### Windows

The software "MediaShow Espresso Video Transcoding" seems to utilize VCE and UVD to the fullest extent possible.[54]

[XSplit Broadcaster](/source/XSplit_Broadcaster) supports VCE from version 1.3.[55]

[Open Broadcaster Software](/source/Open_Broadcaster_Software) (OBS Studio) supports VCE for recording and streaming. The original Open Broadcaster Software (OBS) requires a fork build in order to enable VCE.[56]

[AMD Radeon Software](/source/AMD_Radeon_Software_Crimson) supports VCE with built in game capture ("Radeon ReLive") and use AMD AMF/VCE on APU or Radeon Graphics card to reduce FPS drop when capturing game or video content.[57]

[HandBrake](/source/HandBrake) added Video Coding Engine support in version 1.2.0 in December 2018.[49]

## Successor

Main article: [Video Core Next](/source/Video_Core_Next)

The VCE was succeeded by AMD Video Core Next in the Raven Ridge series of APUs released in October 2017. The VCN combines both encode (VCE) and decode (UVD).[58]

## See also

### Video hardware technologies

#### AMD

- [Video Core Next](/source/Video_Core_Next) - [AMD](/source/Advanced_Micro_Devices)

- Video Coding Engine - [AMD](/source/Advanced_Micro_Devices)

- [Unified Video Decoder](/source/Unified_Video_Decoder) - [AMD](/source/Advanced_Micro_Devices)

- [Video Shader](/source/Video_Shader) - [ATI](/source/ATI_Technologies)

#### Others

- [Intel Quick Sync Video](/source/Intel_Quick_Sync_Video) – Intel's equivalent SIP core

- [Nvidia NVENC](/source/Nvidia_NVENC) – Nvidia's equivalent SIP core

- [Qualcomm Hexagon](/source/Qualcomm_Hexagon) - Qualcomm's equivalent SIP core

## References

1. ^ [***a***](#cite_ref-amd-introducing_1-0) [***b***](#cite_ref-amd-introducing_1-1) ["Introducing the Video Coding Engine (VCE) - AMD"](https://web.archive.org/web/20160604071338/http://developer.amd.com/community/blog/2014/02/19/introducing-video-coding-engine-vce/). *developer.amd.com*. Archived from [the original](http://developer.amd.com/community/blog/2014/02/19/introducing-video-coding-engine-vce/) on 4 June 2016. Retrieved 15 January 2022.

1. **[^](#cite_ref-2)** ["Product brief"](https://www.amd.com/en/media/43876/download). *amd.com*.

1. **[^](#cite_ref-3)** ["Updates"](https://subscriptions.amd.com/newsletters/channelnews/pdf_guides/51884i_update_to_the_qrg_october2014.pdf) (PDF). *amd.com*.

1. **[^](#cite_ref-4)** ["White Paper AMD UnifiedVideoDecoder (UVD)"](https://www.amd.com/Documents/UVD3_whitepaper.pdf) (PDF). 2012-06-15. Retrieved 2017-05-20.

1. **[^](#cite_ref-5)** ["AnandTech Portal | AMD Radeon HD 7970 Review: 28nm And Graphics Core Next, Together As One"](https://web.archive.org/web/20120107150652/http://www.anandtech.com/show/5261/amd-radeon-hd-7970-review/9). Anandtech.com. Archived from [the original](https://www.anandtech.com/show/5261/amd-radeon-hd-7970-review/9) on January 7, 2012. Retrieved 2014-03-27.

1. **[^](#cite_ref-6)** ["AMD's Radeon HD 7970 graphics processor - The Tech Report - Page 5"](https://techreport.com/review/22192/amd-radeon-hd-7970-graphics-processor/5). The Tech Report. 3 January 2012. Retrieved 2014-03-27.

1. **[^](#cite_ref-7)** ["AMD A-Series APU block diagram"](http://www.abload.de/img/llano-blockdiagramm-95qhq1.jpg). 2011-06-30. Retrieved 2015-01-22.[*[permanent dead link](https://en.wikipedia.org/wiki/Wikipedia:Link_rot)*]

1. **[^](#cite_ref-AnandTech_8-0)** ["Video & Movies: The Video Codec Engine, UVD3, & Steady Video 2.0"](https://web.archive.org/web/20120107150652/http://www.anandtech.com/show/5261/amd-radeon-hd-7970-review/9). [AnandTech](/source/AnandTech). December 22, 2011. Archived from [the original](https://www.anandtech.com/show/5261/amd-radeon-hd-7970-review/9) on January 7, 2012. Retrieved 2017-05-20.

1. **[^](#cite_ref-9)** ["Radeon HD 8900 Specs"](https://www.amd.com/en-us/products/graphics/desktop/oem/8900). AMD. Retrieved 2016-07-18.

1. **[^](#cite_ref-10)** ["Mailing Lists"](https://lists.freedesktop.org/archives/dri-devel/2015-June/084083.html). *lists.freedesktop.org*. 4 June 2015. Retrieved 25 September 2023.

1. **[^](#cite_ref-11)** ["VCEEnc"](https://github.com/rigaya/VCEEnc). June 10, 2023 – via GitHub.

1. **[^](#cite_ref-12)** ["AMDGPU (vi.c)"](https://github.com/ROCm/ROCK-Kernel-Driver/blob/master/drivers/gpu/drm/amd/amdgpu/vi.c#L282-L289). *GitHub*.

1. **[^](#cite_ref-13)** ["AMDGPU (vi.c)"](https://github.com/ROCm/ROCK-Kernel-Driver/blob/55cf32d54948f98f1cc6d6b3fdc05b32fab9b3f0/drivers/gpu/drm/amd/amdgpu/vi.c#L2153-L2169). *GitHub*.

1. **[^](#cite_ref-14)** ["Video Encode API: BFrames not supported on RX 4xx? · Issue #8 · GPUOpen-LibrariesAndSDKs/AMF"](https://github.com/GPUOpen-LibrariesAndSDKs/AMF/issues/8). *GitHub*.

1. ^ [***a***](#cite_ref-TR_vega_patch_15-0) [***b***](#cite_ref-TR_vega_patch_15-1) [***c***](#cite_ref-TR_vega_patch_15-2) [***d***](#cite_ref-TR_vega_patch_15-3) Killian, Zak (March 22, 2017). ["AMD publishes patches for Vega support on Linux"](https://techreport.com/news/31627/amd-publishes-patches-for-vega-support-on-linux). Tech Report. Retrieved March 23, 2017.

1. **[^](#cite_ref-16)** Larabel, Michael (20 March 2017). ["AMD Sends Out 100 Patches, Enabling Vega Support In AMDGPU DRM"](https://www.phoronix.com/scan.php?page=news_item&px=AMDGPU-Vega-10-Support). Phoronix. Retrieved 25 August 2017.

1. **[^](#cite_ref-17)** Deucher, Alex (15 May 2018). ["\[PATCH 50/57\] drm/amdgpu/vg20:Enable the 2nd instance IRQ for uvd 7.2"](https://lists.freedesktop.org/archives/amd-gfx/2018-May/022291.html). Retrieved 2019-01-13.

1. **[^](#cite_ref-18)** Deucher, Alex (15 May 2018). ["\[PATCH 42/57\] drm/amd/include/vg20: adjust VCE_BASE to reuse vce 4.0 header files"](https://lists.freedesktop.org/archives/amd-gfx/2018-May/022282.html). Retrieved 2019-01-13.

1. **[^](#cite_ref-19)** ["AMD Announces the 7th Generation APU: Excavator mk2 in Bristol Ridge and Stoney Ridge for Notebooks"](https://www.anandtech.com/show/10362/amd-7th-generation-apu-bristol-ridge-stoney-ridge-for-notebooks). 31 May 2016. Retrieved 3 January 2020.

1. **[^](#cite_ref-20)** ["AMD Mobile "Carrizo" Family of APUs Designed to Deliver Significant Leap in Performance, Energy Efficiency in 2015"](https://www.amd.com/en-us/press-releases/Pages/amd-mobile-carrizo-2014nov20.aspx) (Press release). 20 November 2014. Retrieved 16 February 2015.

1. **[^](#cite_ref-22)** ["The Mobile CPU Comparison Guide Rev. 13.0 Page 5 : AMD Mobile CPU Full List"](https://www.techarp.com/guides/mobile-cpu-comparison-guide/5/). TechARP.com. Retrieved 13 December 2017.

1. ^ [***a***](#cite_ref-Vega_codenames_28-0) [***b***](#cite_ref-Vega_codenames_28-1) ["AMD VEGA10 and VEGA11 GPUs spotted in OpenCL driver"](http://videocardz.com/62250/amd-vega10-and-vega11-gpus-spotted-in-opencl-driver/). VideoCardz.com. Retrieved 6 June 2017.

1. **[^](#cite_ref-31)** Cutress, Ian (1 February 2018). ["Zen Cores and Vega: Ryzen APUs for AM4 – AMD Tech Day at CES: 2018 Roadmap Revealed, with Ryzen APUs, Zen+ on 12nm, Vega on 7nm"](https://www.anandtech.com/show/12233/amd-tech-day-at-ces-2018-roadmap-revealed-with-ryzen-apus-zen-on-12nm-vega-on-7nm/3). Anandtech. Retrieved 7 February 2018.

1. **[^](#cite_ref-32)** Larabel, Michael (17 November 2017). ["Radeon VCN Encode Support Lands in Mesa 17.4 Git"](https://www.phoronix.com/scan.php?page=news_item&px=Radeon-VCN-Encode-Lands). Phoronix. Retrieved 20 November 2017.

1. ^ [***a***](#cite_ref-wccftechCezanne_33-0) [***b***](#cite_ref-wccftechCezanne_33-1) ["AMD Ryzen 5000G 'Cezanne' APU Gets First High-Res Die Shots, 10.7 Billion Transistors In A 180mm2 Package"](https://wccftech.com/amd-ryzen-5000g-cezanne-apu-first-high-res-die-shots-10-7-billion-transistors/). *wccftech*. Aug 12, 2021. Retrieved August 25, 2021.

1. **[^](#cite_ref-34)** Tony Chen; Jason Greaves, ["AMD's Graphics Core Next (GCN) Architecture"](http://meseec.ce.rit.edu/551-projects/fall2014/3-4.pdf) (PDF), *AMD*, retrieved 13 August 2016

1. **[^](#cite_ref-35)** ["A technical look at AMD's Kaveri architecture"](http://semiaccurate.com/2014/01/15/technical-look-amds-kaveri-architecture/). Semi Accurate. Retrieved 6 July 2014.

1. **[^](#cite_ref-37)** ["How do I connect three or More Monitors to an AMD Radeon™ HD 5000, HD 6000, and HD 7000 Series Graphics Card?"](http://support.amd.com/en-us/search/faq/154). AMD. Retrieved 8 December 2014.

1. **[^](#cite_ref-40)** Airlie, David (26 November 2009). ["DisplayPort supported by KMS driver mainlined into Linux kernel 2.6.33"](http://airlied.livejournal.com/68805.html). Retrieved 16 January 2016.

1. **[^](#cite_ref-Radeon_Feature_Matrix_41-0)** ["Radeon feature matrix"](http://xorg.freedesktop.org/wiki/RadeonFeature/). *[freedesktop.org](/source/Freedesktop.org)*. Retrieved 10 January 2016.

1. **[^](#cite_ref-42)** Deucher, Alexander (16 September 2015). ["XDC2015: AMDGPU"](http://www.x.org/wiki/Events/XDC2015/Program/deucher_zhou_amdgpu.pdf) (PDF). Retrieved 16 January 2016.

1. ^ [***a***](#cite_ref-amdgpu_1.2_43-0) [***b***](#cite_ref-amdgpu_1.2_43-1) Michel Dänzer (17 November 2016). ["\[ANNOUNCE\] xf86-video-amdgpu 1.2.0"](https://lists.x.org/archives/xorg-announce/2016-November/002741.html). *lists.x.org*.

1. **[^](#cite_ref-44)** ["AMD Radeon HD 6900 (AMD Cayman) series graphics cards"](http://web.archive.org/web/20220823180458/https://hw-lab.com/amd-radeon-hd-6900-series-amd-cayman.html/4). *HWlab*. hw-lab.com. December 19, 2010. Archived from [the original](https://hw-lab.com/amd-radeon-hd-6900-series-amd-cayman.html/4) on August 23, 2022. Retrieved August 23, 2022. New VLIW4 architecture of stream processors allowed to save area of each SIMD by 10%, while performing the same compared to previous VLIW5 architecture

1. **[^](#cite_ref-45)** ["GPU Specs Database"](https://www.techpowerup.com/gpu-specs/?generation=Northern%20Islands&architecture=TeraScale%203&sort=generation). *TechPowerUp*. Retrieved August 23, 2022.

1. **[^](#cite_ref-48)** ["NPOT Texture (OpenGL Wiki)"](https://www.khronos.org/opengl/wiki/NPOT_Texture). *Khronos Group*. Retrieved February 10, 2021.

1. **[^](#cite_ref-49)** ["OpenGL 4.6 Now Exposed For Old AMD Evergreen & Cayman GPUs On Linux Driver"](https://www.phoronix.com/news/OpenGL-4.6-For-Radeon-R600g). Retrieved 2025-12-12.

1. **[^](#cite_ref-50)** ["Mesamatrix"](https://mesamatrix.net/). *mesamatrix.net*. Retrieved 2025-07-15.

1. **[^](#cite_ref-53)** ["Conformant Products"](https://www.khronos.org/conformance/adopters/conformant-products#submission_820). *[Khronos Group](/source/Khronos_Group)*. Retrieved 2024-12-02.

1. **[^](#cite_ref-54)** ["RADV — The Mesa 3D Graphics Library latest documentation"](https://docs.mesa3d.org/drivers/radv.html). *[Mesa3D](/source/Mesa_(computer_graphics))*. Retrieved 2026-05-27.

1. **[^](#cite_ref-56)** ["radv: add Vulkan 1.4 support"](https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32432). *[Mesa](/source/Mesa_(computer_graphics))*. Retrieved 2024-12-02.

1. **[^](#cite_ref-57)** ["AMD Radeon RX 6800 XT Specs"](https://www.techpowerup.com/gpu-specs/radeon-rx-6800-xt.c3694). *TechPowerUp*. Retrieved January 1, 2021.

1. **[^](#cite_ref-58)** ["AMD Launches The Radeon PRO W7500/W7600 RDNA3 GPUs"](https://www.phoronix.com/news/AMD-Radeon-PRO-W7500-W7600). *Phoronix*. 3 August 2023. Retrieved 4 September 2023.

1. **[^](#cite_ref-59)** ["AMD Radeon Pro 5600M Grafikkarte"](https://www.topcpu.net/de/cpu/Radeon-Pro-5600M). *TopCPU.net* (in German). Retrieved 4 September 2023.

1. **[^](#cite_ref-61)** Larabel, Michael (September 15, 2020). ["AMD Radeon Navi 2 / VCN 3.0 Supports AV1 Video Decoding"](https://www.phoronix.com/scan.php?page=news_item&px=AV1-Decode-For-AMD-VCN-3.0). Phoronix. Retrieved January 1, 2021.

1. **[^](#cite_ref-64)** Edmonds, Rich (February 4, 2022). ["ASUS Dual RX 6600 GPU review: Rock-solid 1080p gaming with impressive thermals"](https://www.windowscentral.com/asus-dual-rx-6600-gpu-review). *Windows Central*. Retrieved November 1, 2022.

1. **[^](#cite_ref-66)** ["Radeon's next-generation Vega architecture"](https://web.archive.org/web/20180906124605/http://radeon.com/_downloads/vega-whitepaper-11.6.17.pdf) (PDF). Radeon Technologies Group (AMD). Archived from [the original](http://radeon.com/_downloads/vega-whitepaper-11.6.17.pdf) (PDF) on September 6, 2018. Retrieved June 13, 2017.

1. **[^](#cite_ref-68)** ["AMDGPU"](https://wiki.gentoo.org/wiki/AMDGPU). Retrieved 2026-05-27.

1. **[^](#cite_ref-69)** ["HandBrake rejected VCE pull request"](https://github.com/HandBrake/HandBrake/pull/88). *[GitHub](/source/GitHub)*. 2016-12-08. Retrieved 2017-08-15.

1. ^ [***a***](#cite_ref-Handbrake_70-0) [***b***](#cite_ref-Handbrake_70-1) ["HandBrake added VCE support in v1.2.0"](https://web.archive.org/web/20220304141623/https://forum.handbrake.fr/viewtopic.php?f=33&t=38539#p181659). 2018-12-22. Archived from [the original](https://forum.handbrake.fr/viewtopic.php?f=33&t=38539#p181659) on 2022-03-04. Retrieved 2018-12-31.

1. **[^](#cite_ref-71)** König, Christian (4 February 2014). ["initial VCE support"](https://lists.freedesktop.org/archives/mesa-dev/2014-February/053203.html). *mesa-dev* (Mailing list). Retrieved 28 November 2015.

1. **[^](#cite_ref-72)** König, Christian (24 October 2013). ["OpenMAX state tracker"](https://lists.freedesktop.org/archives/mesa-dev/2013-October/046943.html). *mesa-dev* (Mailing list). Retrieved 28 November 2015.

1. **[^](#cite_ref-73)** ["AMD Open-Sources VCE Video Encode Engine Code"](https://www.phoronix.com/scan.php?page=news_item&px=MTU5MTc). *[Phoronix](/source/Phoronix)*. 2014-02-04. Retrieved 2017-05-20.

1. **[^](#cite_ref-74)** ["st/omx/enc: implement h264 level support"](https://cgit.freedesktop.org/mesa/mesa/commit/?id=e2db7c10d63399b6a34ba5fa56ce9e1eac402416). 2014-06-12. Retrieved 2017-05-20.

1. **[^](#cite_ref-75)** ["MediaShow Espresso Video Transcoding Benchmark"](https://web.archive.org/web/20220304141613/https://www.guru3d.com/articles_pages/amd_a8_7600_apu_review,13.html). 2014-01-14. Archived from [the original](https://www.guru3d.com/articles_pages/amd_a8_7600_apu_review,13.html) on 2022-03-04. Retrieved 2017-05-20.

1. **[^](#cite_ref-76)** ["XSplit Broadcaster 1.3 maintenance update includes mainly performance enhancements and maintenance fixes including such noteworthy features such as support for AMD's VCE H.264 hardware encoder"](http://www.splitmedialabs.com/news/109-splitmedialabs-releases-xsplit-gamecaster-and-updates-xsplit-broadcaster-13).{{[cite web](https://en.wikipedia.org/wiki/Template:Cite_web)}}: CS1 maint: deprecated archival service ([link](https://en.wikipedia.org/wiki/Category:CS1_maint:_deprecated_archival_service))

1. **[^](#cite_ref-77)** ["OBS branch with AMD VCE support"](https://obsproject.com/forum/threads/obs-branch-with-amd-vce-support.13996/). May 2, 2014. Retrieved 2017-05-20.

1. **[^](#cite_ref-78)** ["Radeon Software Crimson ReLive Edition 16.12.1 Release Notes"](http://support.amd.com/en-us/kb-articles/Pages/Radeon-Software-Crimson-ReLive-Edition-16.12.1-Release-Notes.aspx). Retrieved 2017-05-20.

1. **[^](#cite_ref-79)** Larabel, Michael (17 November 2017). ["Radeon VCN Encode Support Lands In Mesa 17.4 Git"](https://www.phoronix.com/scan.php?page=news_item&px=Radeon-VCN-Encode-Lands). Phoronix. Retrieved 20 November 2017.

v t e AMD graphics Radeon-brand List of GPUs (GPU features template) and List of APUs (APU features template) Fixed pipeline Wonder Mach Rage All-in-Wonder (before 2000) Vertex and fragment shaders R100 R200 R300 R400 R500 All-in-Wonder (after 1999) Unified shaders HD 2000 HD 3000 HD 4000 HD 5000 HD 6000 Unified shaders & memory HD 7000 HD 8000 200 300 400 500 RX Vega 600 RX 5000 Ray tracing RX 6000 Ray tracing & AI cores RX 7000 RX 9000 Software and technologies Multimedia acceleration UVD (video decoding) VCE (video encoding) VCN (video decoding + encoding) Software Current AMD Radeon Software (GPU drivers & control) ROCm (compute platform) AMDGPU (open-source driver) GPUOpen (developer tools) TressFX (real-time hair/fur effects) HLSL2GLSL (shader translation) Obsolete Catalyst (legacy driver) Mantle (deprecated API) AMD APP SDK (compute SDK) CodeXL (profiling & debugging) GPU PerfStudio (GPU analysis) CTM (low-level API) Technologies TrueAudio (stereo 3D) Eyefinity (multi-monitor) FreeSync (variable refresh rate) PowerTune (dynamic power management) CrossFire (multi-GPU) Hybrid Graphics (integrated + discrete) HyperMemory (shared system memory) HyperZ (memory bandwidth optimization) HSA (CPU + GPU compute) GPU microarchitectures TeraScale (2, 3) GCN (2, 3, 4, 5) RDNA (2, 3, 4) UDNA Other products Workstations & supercomputers Current Radeon Pro Radeon Instinct Obsolete FireGL/FirePro FireMV FireStream Consoles Flipper (GameCube) Xenos (Xbox 360) Hollywood (Wii) Liverpool (PlayStation 4) Durango (Xbox One) Neo (PlayStation 4 Pro) Scorpio (Xbox One X) Atari VCS (2021) Oberon (PlayStation 5) Oberon Plus (PlayStation 5 Slim) Project Lockhart (Xbox Series S) Project Scarlett (Xbox Series X) Viola (PlayStation 5 Pro) Handheld PCs Aya Neo OneXPlayer Valve Steam Deck Ayaneo 2 Asus ROG Ally Lenovo Legion Go Microsoft "Asus" ROG Xbox Ally Lenovo Legion Go S MSI Claw A8

---
Adapted from the Wikipedia article [Video Coding Engine](https://en.wikipedia.org/wiki/Video_Coding_Engine) by Wikipedia contributors ([contributor history](https://en.wikipedia.org/wiki/Video_Coding_Engine?action=history)). Available under [Creative Commons Attribution-ShareAlike 4.0 International](https://creativecommons.org/licenses/by-sa/4.0/). Changes may have been made.