# TigerSHARC

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> Markdown URL: https://mediated.wiki/source/TigerSHARC.md
> Source: https://en.wikipedia.org/wiki/TigerSHARC
> Source revision: 1325960625
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{{Short description|Family of microprocessors}}
{{refimprove|date=October 2021}}
{{Infobox CPU architecture
| name           = TigerSHARC
| designer       = [Analog Devices](/source/Analog_Devices)
| bits           = 32-bit
| introduced     = {{Start date and age|2000}}
| version        = 
| design         = DSP/RISC
| type           = [Load–store](/source/Load%E2%80%93store)
| encoding       = ?
| branching      = ?
| endianness     = ?
| extensions     =
| open           =
| registers      = 2 × 32 × 32-bit address registers
| gpr            = 2 × 32 × 32-bit registers (addressable in 16-bit parts)
| fpr            = 
}}
'''TigerSHARC''' refers to a family of [microprocessor](/source/microprocessor)s currently manufactured by [Analog Devices Inc](/source/Analog_Devices) (ADI). It is superscalar and features data-parallelism in the form of short-vector [SIMD](/source/SIMD) and subword (16-bit) parallelism (SWAR). It consists of:<ref>{{cite web |last1=Fridman |first1=Jose |last2=Greenfield |first2=Zvi |title=THE TIGERSHARC DSP ARCHITECTURE |url=https://www.ece.ucdavis.edu/~akella/270W05/reading/tigersharc%20technical%20paper.pdf |date=2000}}</ref>
* Two separate computation blocks (CompBlocks) each with 32 general-purpose registers and their own ALU, multiplier, and shifter; 256-bit read and 128-bit write bus access
* Two integer ALUs (JALU, KALU) each with 32 registers; mainly intended for address generation, but is also capable of general integer arithmetic; 32-bit data bus
* A sequencer with 128-entry 4-way associative branch target buffer; 128-bit data bus 
* Three separate internal memory banks (SRAM)
* External port with DMA

== See also ==
*[SHARC](/source/Super_Harvard_Architecture_Single-Chip_Computer)
*[Blackfin](/source/Blackfin)

== References ==
{{Reflist}}

== External links ==
*[http://www.analog.com/en/processors-dsp/tigersharc/products/index.html TigerSHARC processor website]

Category:Digital signal processors
Category:VLIW microprocessors

{{Microcompu-stub}}

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