# Tabula, Inc.

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For the advertising company, see [Taboola](/source/Taboola).

Tabula, Inc. Type Private Industry Semiconductors Founder Steve Teig Defunct 2015 Key people Dennis Segers (CEO), Steve Teig (CTO) Products Three-dimensional integrated circuit (3-D FPGA) Number of employees >100

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**Tabula, Inc.**, was an American fabless [semiconductor](/source/Semiconductor) company based in [Santa Clara, California](/source/Santa_Clara%2C_California).[1] Founded in 2003 by [Steve Teig](/source/Steve_Teig) (ex-[CTO](/source/Chief_technology_officer) of [Cadence](/source/Cadence_Design_Systems)), it raised $215 million in [venture funding](/source/Venture_capital_financing). The company designed and built [three dimensional](/source/Three-dimensional_integrated_circuit) field programmable gate arrays (3-D [FPGAs](/source/FPGA)) and ranked third on the Wall Street Journal's annual "Next Big Thing" list in 2012.[2]

## Products

Tabula developed [ABAX](https://en.wikipedia.org/w/index.php?title=ABAX&action=edit&redlink=1), a family of [three-dimensional integrated circuits](/source/Three-dimensional_integrated_circuit). The company's [field-programmable gate array](/source/Field-programmable_gate_array) (FPGA) chips were marketed as 3-D [programmable logic devices](/source/Programmable_logic_device) or 3PLDs. The chips have 220-630 thousand 4-input [lookup table](/source/Lookup_table) (LUT) from the user point of view and are capable of working at 1.6 GHz physical clock speed. They also contain up to 1280 [digital signal processing](/source/Digital_signal_processing) (DSP) blocks with 18x18 multipliers with pre-adder; up to 920 [GPIO](/source/GPIO) pins and 48 [SerDes](/source/SerDes) channels (up to 6.5 Gbit/s). ABAX are produced using 40 nm [TSMC](/source/TSMC) process and packaged in [flip-chip](/source/Flip-chip) packages with 1936 or 1156 pins.[*[citation needed](https://en.wikipedia.org/wiki/Wikipedia:Citation_needed)*]

Internally, ABAX chips use high-frequency (1.6 GHz) reconfiguration between up to 8 config states, named *folds*, to emulate a high number of FPGA-resources. If all 8 folds are used to get maximum LUT capacity, user visible clock speed will be 200 MHz; for 4 folds capacity is halved but frequency is doubled and so on.[3]

Volume price of ABAX chips was planned in 2012 to be in the range of 100-200 USD.[3]

Tabula also offered some network solutions, such as: 100 or 40 Gb Ethernet to [Interlaken](/source/Interlaken_(networking)) bridges; high-speed packet search engines; and multiport 10 gigabit Ethernet processors (which could be used as switch, router, or programmable [NIC](/source/Network_interface_controller)).[*[citation needed](https://en.wikipedia.org/wiki/Wikipedia:Citation_needed)*]

In February 2012, Tabula confirmed it would use 22-nm manufacturing process on [Intel](/source/Intel)'s Factories.[4][5] As of July 2013, only 5 companies were allowed to use Intel's manufacturing process: [Achronix](/source/Achronix); Tabula; Netronome; [Microsemi](/source/Microsemi); and [Altera](/source/Altera).[6]

*Spacetime* was a product of Tabula that possibly went beyond the abilities of FPGAs. The company said that Spacetime represented two spatial dimensions and one time dimension as a unified 3D framework. According to Tabula, this appeared to be a simplification that might deliver in production a new category of programmable devices (“3PLDs”) that are denser, faster, and more capable than FPGAs, yet still accompanied by software that automatically maps traditional RTL onto these novel fabrics.[*[citation needed](https://en.wikipedia.org/wiki/Wikipedia:Citation_needed)*]

On 24 March 2015, Tabula officially shut down.[7]

## See also

- [Altera](/source/Altera)

- [Xilinx](/source/Xilinx)

- [Achronix](/source/Achronix)

## References

1. **[^](#cite_ref-WSJ_first_1-0)** ["Business is King Among 'Next Big Thing' Start-Ups"](https://blogs.wsj.com/venturecapital/2012/09/27/business-is-king-among-next-big-thing-start-ups/?mod=google_news_blog). *Venture Capital Dispatch*. 27 September 2012. Retrieved 1 October 2012.

1. **[^](#cite_ref-Bizjournal_first_2-0)** Cromwell Schubarth (26 September 2012). ["Here's 30 Bay Area startups pegged as 'Next Big Thing'"](http://www.bizjournals.com/sanjose/blog/2012/09/bay-area-startups-top-next-big-thing.html). *Business Journal*. Retrieved 1 October 2012.

1. ^ [***a***](#cite_ref-mp_report_2010_3-0) [***b***](#cite_ref-mp_report_2010_3-1) Tom R. Halfhill (2010-03-29). ["Tabula's Time Machine. Rapidly reconfigurable chips will challenge conventional FPGAs"](https://web.archive.org/web/20110410094902/http://www.tabula.com/news/M11_Tabula_Reprint.pdf) (PDF). [Microprocessor Report](/source/Microprocessor_Report) #3 2010. Archived from [the original](http://www.tabula.com/news/M11_Tabula_Reprint.pdf) (PDF) on 2011-04-10.

1. **[^](#cite_ref-4)** Don Clark (2012-02-20). ["Startup Tabula Turns to Intel As Manufacturing Partner"](https://blogs.wsj.com/digits/2012/02/20/startup-tabula-turns-to-intel-as-manufacturing-partner/). WSJ Blogs.

1. **[^](#cite_ref-5)** Clive Maxfield (2012-02-21). ["Tabula's next-gen FPGAs to use Intel's 22nm process featuring 3-D tri-gate transistors"](https://web.archive.org/web/20120224072025/http://www.eetimes.com/electronics-news/4236648/Tabula-s-next-gen-FPGAs-to-use-Intel-s-22nm-process-featuring-3-D-tri-gate-transistors). EETimes. Archived from [the original](http://www.eetimes.com/electronics-news/4236648/Tabula-s-next-gen-FPGAs-to-use-Intel-s-22nm-process-featuring-3-D-tri-gate-transistors) on 2012-02-24.

1. **[^](#cite_ref-rogoway_6-0)** Rogoway, Mike (2013-07-27). Intel dabbles in contract manufacturing, weighing tradeoffs. The Oregonian, July 27, 2013. Retrieved from [http://www.oregonlive.com/silicon-forest/index.ssf/2013/07/intel_dabbles_in_contract_manu.html](http://www.oregonlive.com/silicon-forest/index.ssf/2013/07/intel_dabbles_in_contract_manu.html).

1. **[^](#cite_ref-donato_7-0)** Donato-Weinstein, Nathan (2015-02-11). Tabula to shut down; 120 jobs lost at fabless chip company. Silicon Valley Business Journal, 11 February 2015. Retrieved from [https://www.bizjournals.com/sanjose/news/2015/02/11/tabula-to-shut-down-120-jobs-lost-at-fabless-chip.html](https://www.bizjournals.com/sanjose/news/2015/02/11/tabula-to-shut-down-120-jobs-lost-at-fabless-chip.html).

## External links

- [Official website](https://web.archive.org/web/20150324001331/http://www.tabula.com/) at the [Wayback Machine](/source/Wayback_Machine) (archived 24 March 2015)

- [Steve Teig Lecture on Tabula and Entrepreneurship to Stanford University Students](http://ecorner.stanford.edu/authorMaterialInfo.html?mid=3203), 2013.10.23

- [Steve Teig Lecture on Spacetime 3D Programmable Integrated Circuits](https://www.youtube.com/watch?v=I_uvY-jcmvk) (11 min), 2012.06.18

- [Steve Teig Lecture on Spacetime 3D Programmable Integrated Circuits](https://www.youtube.com/watch?v=3yCCTAXeQ1M) (61 min), 2012.10.07

v t e Programmable logic Concepts ASIC SoC FPGA Logic block CPLD EPLD PLA PAL GAL PSoC Reconfigurable computing Xputer Soft microprocessor Circuit underutilization High-level synthesis Hardware acceleration Hardware description languages Verilog A AMS VHDL AMS VITAL SystemVerilog DPI SystemC AHDL Handel-C Lola PSL UPF PALASM ABEL CUPL C to HDL Flow to HDL MyHDL ELLA Chisel Companies Accellera Achronix AMD Aldec Arm Cadence Infineon Intel Lattice Microchip Technology Nvidia NXP Siemens Synopsys Texas Instruments Products Hardware iCE Stratix Virtex Software Intel Quartus Prime Xilinx ISE Vivado ModelSim VTR Simulators Intellectual property Proprietary ARC ARM Cortex-M LEON LatticeMico8 MicroBlaze PicoBlaze Nios Nios II Open-source JOP LatticeMico32 OpenCores OpenRISC 1200 Power ISA Libre-SOC Microwatt RISC-V

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Adapted from the Wikipedia article [Tabula, Inc.](https://en.wikipedia.org/wiki/Tabula%2C_Inc.) by Wikipedia contributors ([contributor history](https://en.wikipedia.org/wiki/Tabula%2C_Inc.?action=history)). Available under [Creative Commons Attribution-ShareAlike 4.0 International](https://creativecommons.org/licenses/by-sa/4.0/). Changes may have been made.