# Posted write

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> Source: https://en.wikipedia.org/wiki/Posted_write
> Source revision: 1252110812
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{{more citations needed|date=December 2021}}
A '''posted write''' is a [computer bus](/source/bus_(computing)) write transaction that does not wait for a write completion response to indicate success or failure of the write transaction. For a posted write, the CPU assumes that the write cycle will complete with zero wait states, and so doesn't wait for the done. This speeds up writes considerably. For starters, it doesn't have to wait for the done response, but it also allows for better [pipelining](/source/Pipeline_(computing)) of the [datapath](/source/datapath) without much performance penalty.

A '''non-posted''' write requires that a bus transaction responds with a write completion response to indicate success or failure of the transaction, and is naturally much slower than a posted write since it requires a round trip delay similar to read bus transactions.

In reference to memory bus accesses, a posted write is referred to as a [posted memory write (PMW)](/source/Posted_Memory_Writes).

==See also==
* [CPU cache](/source/CPU_cache)
* [Computer memory](/source/Computer_memory)

==References==
{{Reflist}}
* [http://www.mindshare.com/files/ebooks/PCI%20System%20Architecture%20(4th%20Edition).pdf PCI System Architecture, Don Anderson, Tom Shanley, MindShare, Inc - 1999]

== External links ==
* [http://pinouts.ru/pin_Slots.shtml Computer hardware buses and slots pinouts with brief descriptions]

{{Computer-bus}}

Category:Computer buses
Category:Digital electronics
Category:Motherboard

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Adapted from the Wikipedia article [Posted write](https://en.wikipedia.org/wiki/Posted_write) by Wikipedia contributors ([contributor history](https://en.wikipedia.org/wiki/Posted_write?action=history)). Available under [Creative Commons Attribution-ShareAlike 4.0 International](https://creativecommons.org/licenses/by-sa/4.0/). Changes may have been made.