# Opcode prefix

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{{Short description|Part of a computer instruction}}
{{Use dmy dates|date=March 2020|cs1-dates=y}}
{{Machine code}}
In [computing](/source/computing), an '''opcode prefix''' is a numeric [prefix code](/source/prefix_code) that alters the function of a following [opcode](/source/opcode).<ref>{{cite book |last1=Tanenbaum |first1=Andrew S |last2=Austin |first2=Todd |title=Structured Computer Organization |date=2013 |publisher=Pearson Education, Inc |isbn=0-13-291652-5 |page=367 |edition=Sixth}}</ref> On some [instruction set architecture](/source/instruction_set_architecture)s multiple opcode prefixes are allowed sequentially, with all combining to alter the subsequent opcode. The opcode prefix is a portion of a larger [machine language](/source/machine_code) [instruction](/source/instruction_(computer_science)) that specifies the operation to be performed.<ref>{{cite book |last1=Bradley |first1=David Allan |last2=Dawson |first2=D. |last3=Burd |first3=N. C. |last4=Loader |first4=A. J. |title=Mechatronics: Electronics in Products and Processes |date=2018 |publisher=Routledge |location=Boca Raton |isbn=978-0-7487-5742-8 |page=174 |edition=2nd |url=https://www.google.com/books/edition/Mechatronics/YFMPEAAAQBAJ |access-date=6 September 2025}}</ref>

In addition to the opcode, some instructions specify the [operand](/source/operand)s the operation will act upon. Opcode prefixes may alter the number, size, or [addressing mode](/source/addressing_mode) of the operands.

[RISC](/source/Reduced_instruction_set_computer) processors do not use opcode prefixes.

==Types of prefixes==
Opcode prefixes generally fall into two categories:

# Opcode prefixes that alter subsequent opcode functions.
# Opcode prefixes that enable an alternate set of opcodes. This is analogous to the shift key on a keyboard. In this way, instruction sets can be extended by adding a subset of new instructions by reusing existing reserved opcodes.

==Example opcode prefixes==
The following is not intended to be an exhaustive list of opcode prefixes but instead shows how opcode prefixes have been used in various CPU instruction set architectures.

===Microcontroller===
The [National Semiconductor](/source/National_Semiconductor) [COP400](/source/COP400) is an 4-bit [microcontroller](/source/microcontroller) family introduced in 1977. It has 255 single-byte opcodes. It uses a 33H opcode prefix to enable an alternate set of 187 opcodes.<ref>{{cite book |title="COP400 Microcontroller Family COPS Family User's Guide |publisher=National semiconductor |url=https://www.datasheetarchive.com/datasheet/COP400/National-Semiconductor |access-date=23 June 2025}}</ref>

The National Semiconductor [COP8](/source/COP8) is an 8-bit microcontroller introduced in 1988. COP8 is an enhancement to National's earlier COP400. Unlike the COP400, it uses an opcode prefix to alter its operands. Normally, absolute RAM addressing is only directly encoded for just four instructions: <code>LD ''addr8'',#''imm8''</code>, <code>LD A,''addr8''</code>, <code>X A,''addr8''</code>, and <code>IFEQ ''addr8'',#''imm8''</code>. A two-byte {{code|DIR}} opcode prefix may be added to any other instruction that normally uses the B index register to access memory to convert that instruction to absolute RAM addressing. The prefix is 0xBD followed by an 8-bit absolute address. This prefix is unusual in that it is two bytes instead of one.<ref name=basic>{{cite book |title=COP8 Basic Family User's Manual |version=Revision 002 |date=June 1996 |id=Literature Number 620895-002 |publisher=[National Semiconductor](/source/National_Semiconductor) |url=http://bitsavers.org/components/national/_dataBooks/1996_National_COP8_Basic_Family_Users_Manual.pdf |access-date=2021-01-02}}</ref>

===8-bit microprocessor===
The [Zilog Z80](/source/Zilog_Z80) is an 8-bit microprocessor that was launched in 1976. It was designed to be [backward software-compatible](/source/binary-code_compatibility) with the [Intel 8080](/source/Intel_8080). It uses opcode prefixes to both alter its operands and to extend its [instruction set](/source/Z80_instruction_set).

In order to access operands in its new IX and IY registers, 0xDD or 0xFD is prefixed to the old 8080 instructions, allowing those instructions to substitute IX or IY, respectively, for HL. In cases where (HL) is used, (IX+disp) and (IY+disp) addressing modes are substituted.

0xCB and 0xED prefixes enable new instructions not found on the 8080. Prefixes can be combined: The 0xDD or 0xFD IX/IY prefixes can prefix any 0xCB prefixed instruction that uses HL.<ref>{{Cite book |url=https://www.zilog.com/docs/z80/um0080.pdf#G5.1130345 |title=Z80 Family CPU User Manual |publisher=[Zilog](/source/Zilog) |year=2016 |id=UM008011-0816 |access-date=January 5, 2024 |archive-url=https://web.archive.org/web/20231226131929/http://www.zilog.com/docs/z80/um0080.pdf#G5.1130345 |archive-date=December 26, 2023 |url-status=live}}</ref>

===16-bit microprocessor===
The [Intel 8086](/source/Intel_8086) and [8088](/source/Intel_8088) have three types of prefixes, all which can be combined<ref group="note"> There is a bug in the 8086 that causes multiple prefixes on string operations to be forgotten when an interrupt is acknowledged.</ref> to alter some subsequent instructions.<ref>{{cite book |title=The 8086 Family User Manual |date=October 1979 |publisher=Intel |url=http://matthieu.benoit.free.fr/cross/data_sheets/8086_family_Users_Manual.pdf |access-date=16 June 2025}}</ref>

''Segment override:'' Normally the data segment (DS) is used for most data accesses and the stack segment (SS) is used for any accesses involving BP or SP. One-byte segment override prefixes are provided to substitute ES, CS, SS, or DS.

''Repeat:'' String instructions <code>LODS</code>, <code>STOS</code>, <code>MOVS</code>, <code>CMPS</code>, and <code>SCAS</code> normally execute just one iteration. If a  <code>REP</code> prefix is added to any string instruction, it will repeat CX times. The <code>CMPS</code> and <code>SCAS</code> instructions might terminate early if their equal or not equal conditions are satisfied. These instructions can be combined with segment override prefix for the source string.

''Lock:'' The <code>LOCK</code> prefix is used with a [read-modify-write](/source/read-modify-write) instructions such as <code>INC</code>, <code>DEC</code>, or <code>XCHG</code> to insure that another bus master cannot interfere with the read or write operation. <code>LOCK</code> can be combined with segment override prefix.

===64-bit microprocessor===
[AMD64](/source/AMD64) or [x86-64](/source/x86-64) is a 64-bit extension of the [x86](/source/x86) [instruction set.](/source/x86_instruction_listings) It was announced in 1999 and first available in the [AMD Opteron](/source/AMD_Opteron) family in 2003. It introduced a [REX](/source/REX_prefix) opcode prefix that provides additional space for encoding 64-bit addressing modes and the additional eight integer registers present in the x86-64 architecture.<ref>{{cite web|url=https://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-vol-2a-manual.html|title=Intel® 64 and IA-32 Architectures Developer's Manual: Vol. 2A|author=Intel Corporation|date=2016-09-01|accessdate=2021-09-13}}</ref><ref>{{cite book |last1=Harris |first1=David Money |last2=Harris |first2=Sarah L. |title=Digital Design and Computer Architecture |date=2007 |publisher=Morgan Kaufmann Publishers |isbn=978-0-12-370497-9 |page=348 |url=https://www.r-5.org/files/books/computers/hw-layers/hardware/digital-desigh/David_Harris_Sarah_Harris-Digital_Design_and_Computer_Architecture-EN.pdf |access-date=6 September 2025}}</ref>

==References==
{{Reflist}}

==Notes==
{{reflist|group=note|liststyle=lower-roman}}

Category:Machine code
Category:Instruction set architectures

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Adapted from the Wikipedia article [Opcode prefix](https://en.wikipedia.org/wiki/Opcode_prefix) by Wikipedia contributors ([contributor history](https://en.wikipedia.org/wiki/Opcode_prefix?action=history)). Available under [Creative Commons Attribution-ShareAlike 4.0 International](https://creativecommons.org/licenses/by-sa/4.0/). Changes may have been made.