# NanGate

> Mediated Wiki article. Canonical URL: https://mediated.wiki/source/NanGate
> Markdown URL: https://mediated.wiki/source/NanGate.md
> Source: https://en.wikipedia.org/wiki/NanGate
> Source revision: 1356957071
> License: Creative Commons Attribution-ShareAlike 4.0 International (https://creativecommons.org/licenses/by-sa/4.0/)

{{Short description|Former electrical engineering corporation}}
{{advert|date=April 2013}}
{{Infobox company
| name        = NanGate, Inc
| logo        = NanGate logo in RGB colors, NanGate.jpg
| type        = [Private](/source/Private_company)
| founded     = 2004
| hq_location = [Santa Clara, California](/source/Santa_Clara%2C_California), <br>[United States](/source/United_States)
| industry    = [EDA](/source/Electronic_Design_Automation), [Intellectual Property](/source/Intellectual_Property)
| fate        = Acquisition by [Silvaco, Inc.](/source/Silvaco) in 2018
| website     = [http://www.nangate.com nangate.com]
}}

'''NanGate, Inc''' was a privately held United States, [Silicon Valley](/source/Silicon_Valley){{En dash}}based company dealing in [electronic design automation (EDA)](/source/electronic_design_automation) for [electrical engineering](/source/electrical_engineering) and [electronics](/source/electronics) until its acquisition by [Silvaco, Inc.](/source/Silvaco) in 2018.<ref>{{cite news |title=Silvaco Completes Acquisition of NanGate |url=https://www.businesswire.com/news/home/20180305005239/en/Silvaco-Completes-Acquisition-NanGate |newspaper=BusinessWire |access-date=2023-08-10 |archive-date=2019-08-29 |archive-url=https://web.archive.org/web/20190829222643/https://www.businesswire.com/news/home/20180305005239/en/Silvaco-Completes-Acquisition-NanGate |url-status=live }}</ref> NanGate was founded in October 2004 by a group of [semiconductor](/source/semiconductor) professionals with a background from [Intel Corporation](/source/Intel_Corporation) and [Vitesse Semiconductor Corp](/source/Vitesse_Semiconductor). The company has received capital investments from a group of [Danish](/source/Denmark) [business angels](/source/Angel_Investor) and [venture capital](/source/venture_capital) companies.<ref>{{cite news|title=EDA Startup NanGate Secures $10 Million in Venture Capital|url=http://www.insidechips.com/public/6791.cfm|newspaper=InsideChips|url-status=dead|archiveurl=https://archive.today/20130411035247/http://www.insidechips.com/public/6791.cfm|archivedate=2013-04-11}}</ref><ref>{{cite news |title = Danske investorer skyder 50 mio kr i NanGate |url = http://borsen.dk/nyheder/avisen/artikel/12/1714553/artikel.html |newspaper = Børsen |access-date = 2013-02-15 |archive-date = 2016-03-04 |archive-url = https://web.archive.org/web/20160304001700/http://borsen.dk/nyheder/avisen/artikel/12/1714553/artikel.html |url-status = live }}</ref> The company is today owned and controlled by its management following a [management buy-out](/source/management_buy-out) in 2012.<ref>{{cite news|title=NanGate Completes Management Buy-Out|url=http://www10.edacafe.com/nbc/articles/1/1156747/NanGate-Completes-Management-Buy-Out|newspaper=EDACafe|access-date=2013-02-15|archive-date=2016-03-04|archive-url=https://web.archive.org/web/20160304062802/http://www10.edacafe.com/nbc/articles/1/1156747/NanGate-Completes-Management-Buy-Out|url-status=live}}</ref> NanGate markets a range of [software](/source/software) products and design services for the design and optimization of [standard cell libraries](/source/standard_cell) and [application-specific integrated circuits](/source/application-specific_integrated_circuits). The market focus is standard cell library design and optimization for 14{{En dash}}28 [nanometer](/source/nanometer) [CMOS](/source/CMOS) processes.<ref>{{cite news|title=TSMC deploys Nangate's NDO, Library Creator|url=http://www.eetimes.com/electronics-products/ip-eda-products/4213902/TSMC-deploys-Nangate-s-NDO--Library-Creator-|newspaper=EEtimes}}</ref><ref>{{cite news|title=NanGate Design Optimizer™ and Library Creator™ for Advanced 28nm SoC Design Adopted by Fujitsu Semiconductor|url=http://www10.edacafe.com/nbc/articles/1/1019251/NanGate-Design-Optimizer-Library-Creator-Advanced-28nm-SoC-Design-Adopted-by-Fujitsu-Semiconductor|newspaper=EDACafe|access-date=2013-02-15|archive-date=2011-11-21|archive-url=https://web.archive.org/web/20111121074248/http://www10.edacafe.com/nbc/articles/1/1019251/NanGate-Design-Optimizer-Library-Creator-Advanced-28nm-SoC-Design-Adopted-by-Fujitsu-Semiconductor|url-status=live}}</ref>

==History==
NanGate was founded in October 2004 by a group of semiconductor professionals from [Vitesse Semiconductor Corp](/source/Vitesse_Semiconductor). Prior to Vitesse, the team had founded Exbit Technology, a fabless semiconductor start-up focused on the market for [Gigabit](/source/Gigabit_Ethernet) and [10 Gigabit Ethernet](/source/10_Gigabit_Ethernet) ASSPs used in high performance [data](/source/data_communication) and [telecommunication](/source/telecommunication)s [switching](/source/ethernet_switch) and [routing](/source/router_(computing)) equipment. Exbit Technology was acquired by Vitesse Semiconductor Corp in 2001.<ref>{{cite news|title=Vitesse Semiconductor Announces Acquisition of Exbit Technology|url=http://www.eetimes.com/electronics-news/4153122/Vitesse-Semiconductor-Announces-Acquisition-of-Exbit-Technology|newspaper=EEtimes|access-date=2013-02-15|archive-date=2023-08-10|archive-url=https://web.archive.org/web/20230810074152/https://www.eetimes.com/Vitesse-Semiconductor-Announces-Acquisition-of-Exbit-Technology/|url-status=live}}</ref>

The technology and market idea behind the foundation of NanGate was to address and solve the inherent shortcomings of [standard cell](/source/standard_cell) based ASSP/[ASIC](/source/Application-specific_integrated_circuit) design as compared to [full custom](/source/full_custom) IC design. In standard cell design the designer uses cells from a standard cell library to implement the desired [logic functionality](/source/logic_gate) of the [IC](/source/integrated_circuit) while trying to obtain the target [operating frequency](/source/operating_frequency) at the lowest possible cost in terms of [die area](/source/die_(integrated_circuit)) and [power consumption](/source/low_power_electronics). The standard cells form the basic building blocks used to build the IC together with macro blocks such as [embedded memory](/source/random_access_memory), Input-Output (IO), [mixed-signal and analog blocks](/source/electronic_circuit). Each standard cell represents a relatively primitive [logic function](/source/logic_function), such as a [NAND gate](/source/NAND_gate), with fixed area, timing and power characteristics and is constructed from [transistors](/source/MOSFET) most often arranged in the pull-up/pull-down fashion of [CMOS](/source/CMOS). A typical standard-cell library for e.g. 40 [nanometer](/source/nanometer) CMOS has 500{{En dash}}1500 standard cells and about 150{{En dash}}300 different logic functions.

The benefits of the standard cell library design methodology are many but compared to full-custom IC design there is a large gap between what can be achieved when comparing the two methodologies in terms of highest possible operating frequency, lowest possible die area and power consumption. This is first and foremost due to the fact that in full-custom IC design, the engineer can handcraft and optimize the design on the transistor level without having to use only fixed-sized standard cells.<ref>{{cite book|last=Chinnery & Kurtz|title=Closing the Gap Between ASIC & Custom: Tools and Techniques for High-Performance ASIC Design|year=2002|publisher=Kluwer Academic Publishers|isbn=1-4020-7113-2|url=https://www.amazon.com/Closing-Between-ASIC-Custom-High-Performance/dp/1402071132#_|access-date=2023-08-10|archive-date=2015-03-17|archive-url=https://web.archive.org/web/20150317025934/http://www.amazon.com/Closing-Between-ASIC-Custom-High-Performance/dp/1402071132#_|url-status=live}}</ref> Full-custom IC design is much more resource and time-consuming and only a minority of ICs have a market potential that is able to pay for such an investment in research and development.

NanGate addresses this gap by providing the IC designer with a range of software products that allow him to specify and create new standard cells with custom transistor layout in an automated manner. The IC designer can thereby augment and optimize the cell library used to implement the IC. This process of growing and tweaking the cell library enables higher performance, lower die area and lower power consumption which serve to narrow the gap between the standard-cell and full-custom design methodologies. This [patent](/source/patent)-protected technology is core to NanGate's range of software products.<ref>{{cite web |title=Methods of deriving switch networks United States Patent 7877711 |url=http://www.freepatentsonline.com/7877711.html |access-date=2013-02-15 |archive-date=2015-02-14 |archive-url=https://web.archive.org/web/20150214225746/http://www.freepatentsonline.com/7877711.html |url-status=live }}</ref><ref>{{cite web|title=Library sizing United States Patent 8015517|url=http://www.freepatentsonline.com/8015517.html|access-date=2013-02-15|archive-date=2015-02-14|archive-url=https://web.archive.org/web/20150214223525/http://www.freepatentsonline.com/8015517.html|url-status=live}}</ref><ref>{{cite web|title=Optimization of integrated circuit design and library United States Patent 8024695|url=http://www.freepatentsonline.com/8024695.html|access-date=2013-02-15|archive-date=2015-02-14|archive-url=https://web.archive.org/web/20150214224236/http://www.freepatentsonline.com/8024695.html|url-status=live}}</ref><ref>{{cite web|title=Cell uniquification United States Patent 8214787|url=http://www.freepatentsonline.com/8214787.html|access-date=2013-02-15|archive-date=2015-02-14|archive-url=https://web.archive.org/web/20150214233101/http://www.freepatentsonline.com/8214787.html|url-status=live}}</ref><ref>{{cite web|title=Library enrichment United States Patent 8219962|url=http://www.freepatentsonline.com/8219962.html|access-date=2013-02-15|archive-date=2015-02-14|archive-url=https://web.archive.org/web/20150214224233/http://www.freepatentsonline.com/8219962.html|url-status=live}}</ref><ref>{{cite web|title=Optimizing a circuit design library United States Patent 8271930|url=http://www.freepatentsonline.com/8271930.html|access-date=2013-02-15|archive-date=2015-02-14|archive-url=https://web.archive.org/web/20150214224231/http://www.freepatentsonline.com/8271930.html|url-status=live}}</ref>

During 2004{{En dash}}2006, the NanGate team worked on developing a library creation platform with built-in automation for [layout](/source/Integrated_circuit_layout) creation and library characterization (the process of [SPICE](/source/SPICE) simulating the [extracted](/source/circuit_extraction) circuit [netlist](/source/netlist) with parasitics and building a model used for [static timing analysis](/source/static_timing_analysis)). This resulted in two software products, NanGate Library Creator(TM) and Nangate Library Characterizer(TM),  the prototype versions of which were introduced at the annual [Design Automation Conference](/source/Design_Automation_Conference) in 2005 and the first official releases of the two products the following year, DAC-2006.<ref>{{cite web|title=2006 43rd Design Automation Conference|url=http://www2.dac.com/43rd//index.html|access-date=2013-02-16|archive-date=2012-12-30|archive-url=https://web.archive.org/web/20121230080608/http://www2.dac.com/43rd/index.html|url-status=live}}</ref> Nangate Library Characterizer(TM) got on John Cooley’s best-of-DAC 2006 list.<ref>{{cite web|title=John Cooley's Best of DAC-2006|url=http://www.demosondemand.com/dod/feat_cont/dac/dac06.aspx|access-date=2013-02-16|archive-date=2013-06-17|archive-url=https://web.archive.org/web/20130617140009/http://www.demosondemand.com/dod/feat_cont/dac/dac06.aspx|url-status=live}}</ref>

In October 2005, NanGate established collaboration with [UFRGS](/source/UFRGS) (a university located in [Porto Alegre, Brazil](/source/Porto_Alegre%2C_Brazil)) that resulted in NanGate Labs, and later in 2006 the establishment of NanGate do Brasil SA, a research and development subsidiary in the same location.<ref>{{cite web|title=Nangate-UFRGS Research Lab|url=http://www.inf.ufrgs.br/nangate/|access-date=2013-02-16|archive-date=2012-05-16|archive-url=https://web.archive.org/web/20120516030553/http://www.inf.ufrgs.br/nangate/|url-status=live}}</ref> The Brazilian based subsidiary was closed down in 2011 in order to consolidate the R&D teams in fewer locations.

In 2006, NanGate received US$10 million in [venture capital](/source/venture_capital) investment from three Danish-based venture capital companies: Vækstfonden,<ref>{{cite web|title=Vækstfonden|url=http://www.vf.dk/?sc_lang=en|access-date=2013-02-16|archive-date=2013-10-02|archive-url=https://web.archive.org/web/20131002205722/http://www.vf.dk/?sc_lang=en|url-status=live}}</ref> IVS<ref>{{cite web|title=NorthCap Partners - former IVS|url=http://www.northcap.vc/|access-date=2013-02-16|archive-date=2013-02-07|archive-url=https://web.archive.org/web/20130207021037/http://www.northcap.vc/|url-status=live}}</ref>  and SeeD Capital.<ref>{{cite web|title=SeeD Capital Denmark|url=http://www.seedcapital.dk/|access-date=2013-02-16|archive-date=2013-02-07|archive-url=https://web.archive.org/web/20130207043421/http://www.seedcapital.dk/|url-status=live}}</ref>

Also in 2006, NanGate, Inc was established in [Sunnyvale, CA](/source/Sunnyvale%2C_CA), in order to promote sales and support customers in the Silicon Valley area. The company also established a [subsidiary](/source/subsidiary) in [Moscow](/source/Moscow), the [Russian Federation](/source/Russian_Federation) to focus on research and development in layout compaction technologies.<ref>{{cite web|title=Compaction - Kurt Keutzer et al|url=http://www.eecs.berkeley.edu/~keutzer/classes/244fa2004/pdf/5-1-compaction.pdf|access-date=2013-02-16|archive-date=2016-03-04|archive-url=https://web.archive.org/web/20160304202439/http://www.eecs.berkeley.edu/~keutzer/classes/244fa2004/pdf/5-1-compaction.pdf|url-status=live}}</ref> This subsidiary was closed in the fall of 2012.

NanGate was awarded the [Ernst & Young Entrepreneur of the Year](/source/Ernst_%26_Young_Entrepreneur_of_the_Year) 2007 in the start-up category in the Danish region.<ref>{{cite news|title=NanGate is the best start-up company in Denmark|url=http://www.ue.dk/nyhedsarkiv/15841.aspx|url-status=dead|archiveurl=https://web.archive.org/web/20071214163255/http://www.ue.dk/nyhedsarkiv/15841.aspx|archivedate=2007-12-14}}</ref>

Also in 2007, NanGate released two new software products, NanGate Liberty Analyze(TM) and NanGate Design Audit(TM). The software products target the verification and cross-check of the library characterization.

In 2008, NanGate introduced the first prototype version of NanGate Design Optimizer(TM) at the Design Automation Conference.

Also, in 2008, NanGate donated a free 45&nbsp;nm open source digital library through [Si2](/source/Silicon_Integration_Initiative) to promote [interoperability](/source/interoperability) and independent testing of [standard cell](/source/standard_cell)–based software products.<ref>{{cite web|title=Nangate and Si2 Release Unprecedented Free 45nm Open Source Digital Cell Library|url=http://www.src.org/newsroom/press-release/2008/46/|access-date=2013-02-16|archive-date=2020-09-22|archive-url=https://web.archive.org/web/20200922112330/https://www.src.org/newsroom/press-release/2008/46/|url-status=live}}</ref> The open cell library is one of the most used libraries for independent [EDA](/source/Electronic_design_automation) flow testing and academic research.<ref>{{cite web|last=Lee|first=John Hyung|title=Implications of Modern Semiconductor Technologies|url=http://nanocad.ee.ucla.edu/pub/Main/Publications/PHDTH2_paper.pdf|publisher=University of California Los Angeles|access-date=2013-02-16|archive-date=2013-09-19|archive-url=https://web.archive.org/web/20130919033052/http://nanocad.ee.ucla.edu/pub/Main/Publications/PHDTH2_paper.pdf|url-status=live}}</ref> It can be downloaded from the website of Si2<ref>{{cite web|title=NanGate FreePDK45 Generic Open Cell Library|url=http://www.si2.org/openeda.si2.org/projects/nangatelib|access-date=2013-02-16|archive-date=2013-05-17|archive-url=https://web.archive.org/web/20130517231946/http://www.si2.org/openeda.si2.org/projects/nangatelib|url-status=live}}</ref>  and was updated in 2011.<ref>{{cite news|title=NanGate Releases New 45nm Open Cell Library through Si2|url=https://www.reuters.com/article/2011/09/13/idUS138052+13-Sep-2011+BW20110913|archive-url=https://archive.today/20130411171714/http://www.reuters.com/article/2011/09/13/idUS138052+13-Sep-2011+BW20110913|url-status=dead|archive-date=2013-04-11|newspaper=Reuters}}</ref>

In 2009, NanGate was awarded the "Best Presentation Award" at the Nordic Venture Summit 2009.<ref>{{cite web|title=NVF Best Presentation Award|url=http://www.e-unlimited.com/events/view.aspx?events_pages_id=26|access-date=2013-02-16|archive-date=2012-11-18|archive-url=https://web.archive.org/web/20121118013413/http://www.e-unlimited.com/events/view.aspx?events_pages_id=26|url-status=live}}</ref>

Also in 2009, the company released the first so-called MegaLibrary(TM) for 65&nbsp;nm [SoC design](/source/system_on_a_chip). A MegaLibrary is a very large standard cell library in terms of logic functions and variants in terms of [drive strength](/source/drive_strength) and relative transistor sizing (such as P/N ratio or tapered inputs). A pre-made MegaLibrary presents an alternative to creating new standard cells on-the-fly (e.g. using NanGate Library Creator) for optimization purposes. As a typical standard cell library contains only a small subset of the possible [Boolean function](/source/Boolean_function)s, two or more standard cells are needed to implement functions not found in the library. As an example, there are 3984 Boolean P-equivalent functions with 4 inputs and about 37 million with 5 inputs.<ref>{{cite web|last=Correia & Reis|title=Classifying n-input Boolean functions|url=http://www.docstoc.com/docs/88088744/Classifying-n-Input-Boolean-Functions|access-date=2013-02-16|archive-date=2014-04-27|archive-url=https://web.archive.org/web/20140427210531/http://www.docstoc.com/docs/88088744/Classifying-n-Input-Boolean-Functions|url-status=live}}</ref><ref>{{Cite OEIS|1=A003180|2=Number of equivalence classes of Boolean functions of n variables under action of symmetric group}}</ref> The concept of automatic generation of footprint-compatible cells was also introduced. A set of standard cells are said to be footprint compatible when they are interchangeable from a [place-and-route](/source/place_and_route) perspective without causing [DRC](/source/design_rule_check) errors. Footprint-compatibility is typically obtained from a maximum sized base cell from which versions are derived having identical layers from metal-1 and up but having differently sized [diffusion](/source/Depletion_region) areas to implement transistor sizing variants.

The combination of NanGate MegaLibrary(TM) and NanGate Design Optimizer(TM) enables a new type of digital gate-level re-[synthesis](/source/logic_synthesis) where the library and library content becomes part of the optimization objective. During optimization, subsets of library cells are selected and presented to the technology mapper while other subsets are forcefully removed from the set of allowed cells. In this manner, the optimal library subset from the MegaLibrary is selected for the particular digital design block being optimized.

A MegaLibrary with a large set of footprint-compatible cells can be used for timing and power optimization after the place-and-route stage is completed.

During 2009{{En dash}}2011, NanGate continued development on the Library Platform products and Nangate Design Optimizer(TM) and released updated versions targeting more and more advanced process nodes leading to support for 28&nbsp;nm in 2009 and 22&nbsp;nm in 2011 with public announcements from two customers, [TSMC](/source/TSMC) and [Fujitsu](/source/Fujitsu).

In 2010, NanGate was appointed to lead the European SYNAPTIC project, a project to define next-generation design methodologies with focus on methods to enhance [lithography](/source/lithography)-based yield.<ref>{{cite news|title=EU project to define next gen design methodologies|url=http://eetimes.com/electronics-news/4087626/EU-project-to-define-next-gen-design-methodologies|newspaper=EEtimes|access-date=2013-02-16|archive-date=2023-08-10|archive-url=https://web.archive.org/web/20230810074153/https://www.eetimes.com/EU-project-to-define-next-gen-design-methodologies/|url-status=live}}</ref> The SYNAPTIC project, now completed, was done in collaboration with [STMicroelectronics](/source/STMicroelectronics), [IMEC](/source/IMEC), [Politecnico di Milano](/source/Politecnico_di_Milano) (Italy), [Universitat Politècnica de Catalunya](/source/Universitat_Polit%C3%A8cnica_de_Catalunya) (Spain) and [Universidade Federal do Rio Grande do Sul](/source/Universidade_Federal_do_Rio_Grande_do_Sul) (Brazil)<ref>{{cite web|title=SYNAPTIC|url=https://web50.dmz.polimi.it/synapticproject/|access-date=2013-02-16|archive-date=2015-02-15|archive-url=https://web.archive.org/web/20150215014922/https://web50.dmz.polimi.it/synapticproject/|url-status=live}}</ref>

In 2012, the company went through a restructure process and changed ownership as three of the original founders completed a management buy-out. The Danish legal entity NanGate A/S went through a bankruptcy process as the venture capital owners of NanGate A/S decided not to provide additional capital. As part of the restructure process NanGate, Inc became the new headquarter, located in Silicon Valley. A new Danish legal entity was established to replace and take over research and development activities from NanGate A/S.

In 2013, NanGate announced a strategic collaboration with Sagantec<ref>{{cite web|title=Sagantec|url=http://www.sagantec.com/|access-date=2013-02-16|archive-date=2013-05-18|archive-url=https://web.archive.org/web/20130518050953/http://www.sagantec.com/|url-status=live}}</ref>  to provide library design capability for 14-22&nbsp;nm process technologies. Process technologies at geometries below 28&nbsp;nm present new technological challenges that affect the transistor layout and metal layers used in the standard cells. Usage of [next-generation lithography](/source/next-generation_lithography) technologies such as double-patterning and coloring are new methods that enables scaling to 14&nbsp;nm geometries.

In 2018, Nangate was acquired by [Silvaco, Inc.](/source/Silvaco) in 2018.<ref>{{cite news |title=Silvaco Completes Acquisition of NanGate |url=https://semiengineering.com/the-week-in-review-design-120/ |newspaper=Semiconductor Engineering |access-date=2023-08-10 |archive-date=2020-11-29 |archive-url=https://web.archive.org/web/20201129165759/https://semiengineering.com/the-week-in-review-design-120/ |url-status=live }}</ref> Terms of the agreement were not disclosed.

==Management==
As of February 2013, Ole Christian Andersen is the President and CEO of Nangate, Inc – a position he has held since the inception of the company. 
 
Dr. Jens P. Tagore-Brage serves as CTO and VP R&D. Jens Tagore-Brage is a co-founder of NanGate and has held the position as CTO throughout the whole period.

Jens C. Michelsen was promoted to COO as part of the management buy-out after serving as VP Professional Services since the inception of the company. Jens Michelsen is also a co-founder of NanGate.

==References==
{{reflist|colwidth=30em}}

==External links==
{{Official website|http://www.nangate.com}}

Category:Companies based in Santa Clara, California
Category:2004 establishments in California

---
Adapted from the Wikipedia article [NanGate](https://en.wikipedia.org/wiki/NanGate) by Wikipedia contributors ([contributor history](https://en.wikipedia.org/wiki/NanGate?action=history)). Available under [Creative Commons Attribution-ShareAlike 4.0 International](https://creativecommons.org/licenses/by-sa/4.0/). Changes may have been made.