# Memory buffer register

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{{Short description|Register in a computer's CPU}}
A '''memory buffer register''' ('''MBR''') or '''memory data register''' ('''MDR''') is the [register](/source/processor_register) in a computer's [CPU](/source/central_processing_unit) that stores the data being transferred to and from the immediate access storage. It was first implemented in [von Neumann model](/source/Von_Neumann_architecture). It contains a copy of the value in the memory location specified by the [memory address register](/source/memory_address_register). It acts as a [buffer](/source/Data_buffer),<ref>{{Citation |last=#Mett|first=Percy |title= Hardware |date= 1990 |url=https://doi.org/10.1007/978-1-349-08039-7_5 |work=Introduction to Computing |pages=117–162 |editor-last=Mett |editor-first=Percy |access-date=2024-01-15 |place=London |publisher=Macmillan Education UK |language=en |doi=10.1007/978-1-349-08039-7_5 |isbn=978-1-349-08039-7|url-access=subscription }}</ref> allowing the processor and [memory units](/source/Random_access_memory) to act independently without being affected by minor differences in operation. A data item will be copied to the MBR ready for use at the next [clock](/source/clock_signal) cycle, when it can be either used by the processor for reading or writing, or stored in main memory after being written.

This register holds the contents of the memory which are to be transferred from memory to other components or vice versa.  A [word](/source/Word_(data_type)) to be stored must be transferred to the MBR, from where it goes to the specific memory location, and the arithmetic data to be processed in the [ALU](/source/Arithmetic_logic_unit) first goes to MBR and then to accumulator register, before being processed in the ALU.

The MDR is a ''two-way register.''<ref>{{Cite book |last1=Dharshana |first1=K.S |last2=Balasubramanian |first2=Kannan |last3=Arun |first3=M. |title=Encrypted computation on a one instruction set architecture  |date=2016 |pages=1–6 |doi=10.1109/ICCPCT.2016.7530376 |isbn=978-1-5090-1277-0 }}</ref> When data is fetched from memory and placed into the MDR, it is written to go in one direction. When there is a write instruction, the data to be written is placed into the MDR from another CPU register, which then puts the data into memory.

The memory data register is half of a minimal interface between a [microprogram](/source/microprogram) and [computer storage](/source/computer_storage); the other half is a [memory address register](/source/memory_address_register) (MAR).

During the read/write phase, the [Control Unit](/source/Control_Unit) generates control signals that direct the [memory controller](/source/memory_controller) to fetch or store data.

== References ==
{{Reflist}}

Category:Digital registers

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