# Janet Olson

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**Janet Olson** is a Silicon Valley technology executive and leading contributor to the field of semiconductor [Electronic Design Automation](/source/Electronic_Design_Automation) (EDA).[1] For over 30 years, she was Vice President of Engineering at the world's top two semiconductor EDA companies - first [Synopsys](/source/Synopsys) and then [Cadence Design Systems](/source/Cadence_Design_Systems).[1] She holds 9 U.S. patents.[2]

With a focus on logic synthesis,[3] Olson published numerous papers and presented at international EDA conferences, such as the [International Symposium on Physical Design](/source/International_Symposium_on_Physical_Design), the [International Conference on Computer-Aided Design](/source/International_Conference_on_Computer-Aided_Design), and [Design Automation and Test in Europe](/source/Design_Automation_and_Test_in_Europe).[4] [5] [6] [7]

She is on the Board of Equal Opportunity Schools, and chairs its Technology Governance Committee.[2]

Olson obtained her BS in electrical engineering and computer engineering at [Carnegie Mellon University](/source/Carnegie_Mellon_University) and MS in electrical engineering from [Stanford University](/source/Stanford_University).[1][3]

## Awards

- [Design Automation Conference](/source/Design_Automation_Conference) Marie R. Pistilli Women in Engineering Achievement Award to honor outstanding EDA achievements, 2017[3]
- [YWCA](/source/YWCA) Tribute to Women Award, 2015[1]

## References

1. ["Janet Olson"](https://www.semiconwest.org/speakers/janet-olson) [Archived](https://web.archive.org/web/20191008183356/https://www.semiconwest.org/speakers/janet-olson) 2019-10-08 at the Wayback Machine, Semicon West speaker profile

1. ["Janet Olson"](https://eoschools.org/person/janet-olson/). *Equal Opportunity Schools*. Retrieved June 8, 2025.

1. ["Janet Olson to Receive Marie R. Pistilli Women in Engineering Achievement Award"](https://eldiariony.com/latinowire/janet-olson-to-receive-marie-r-pistilli-women-in-engineering-achievement-award/)

1. ["Synthesis for Advanced Nodes: An Industry Perspective"](https://dl.acm.org/doi/10.1145/2160916.2160953). *ACM Digital Library*. March 25, 2012. [doi:10.1145/2160916.2160953](https://doi.org/10.1145/2160916.2160953). Retrieved June 8, 2025.

1. ["Enabling Exact Delay Synthesis"](https://dl.acm.org/doi/10.5555/3199700.3199747). *ACM Digital Library*. November 13, 2017. Retrieved June 8, 2025.

1. ["Logic optimization and synthesis: trends and directions in industry"](https://dl.acm.org/doi/10.5555/3130379.3130687). *ACM Digital Library*. March 27, 2017. Retrieved June 8, 2025.

1. Amaru, Luca; Soeken, Mathias; Vuillod, Patrick; Luo, Jiong; Mishchenko, Alan; Olson, Janet; Brayton, Robert; De Micheli, Giovanni (March 2018). ["Improvements to Boolean Resynthesis"](https://ieeexplore.ieee.org/document/8342108). *IEEE Explore*. pp. 755–760. [doi:10.23919/DATE.2018.8342108](https://doi.org/10.23919/DATE.2018.8342108). ISBN 978-3-9819263-0-9. Retrieved June 8, 2025.

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