# Interface logic model

> Mediated Wiki article. Canonical URL: https://mediated.wiki/source/Interface_logic_model
> Markdown URL: https://mediated.wiki/source/Interface_logic_model.md
> Source: https://en.wikipedia.org/wiki/Interface_logic_model
> Source revision: 1313616559
> License: Creative Commons Attribution-ShareAlike 4.0 International (https://creativecommons.org/licenses/by-sa/4.0/)

{{multiple issues|
{{Technical|section|date=October 2013}}
{{refimprove|date=August 2018}}
}}

In [electronics](/source/electronics), the '''interface logic model''' ('''ILM''') is a technique to model blocks in hierarchal [VLSI](/source/VLSI) implementation flow. It is a gate level [model](/source/Model_(science)) of a physical block where only the connections from the [input](/source/input_(computer_science))s to the first stage of flip-flops, and the connections from the last stage of [flip-flops](/source/Flip-flop_(programming)) to the outputs are in the model, including the flip-flops and the [clock tree](/source/clock_tree) driving these flip-flops. All other internal flip-flop to flip-flop paths are stripped out of the ILM.

The advantage of ILM is that the entire path (clock to clock path) is visible at top level for [interface](/source/interface_(computing)) nets, unlike traditional block-based hierarchal implementation flow. This gives better accuracy in analysis for interface nets at negligible additional [memory](/source/computer_memory) and [runtime](/source/run_time_(program_lifecycle_phase)) overhead.

File:Flat ilm block view vlsi 600x540.jpg

==References==
* [https://chipmlcc.ru/product/category/integrated-circuits-ics-430.html Интегральные схемы]
{{Reflist}}

==External links==
*[https://web.archive.org/web/20110718112352/http://www.emba.uvm.edu/~jswift/uvm_class/notes/phys_syn.pdf Introduction to Physical Compiler and ILM Flow]

{{Portal bar|Electronics}}
Category:Integrated circuits
Category:Conceptual models

---
Adapted from the Wikipedia article [Interface logic model](https://en.wikipedia.org/wiki/Interface_logic_model) by Wikipedia contributors ([contributor history](https://en.wikipedia.org/wiki/Interface_logic_model?action=history)). Available under [Creative Commons Attribution-ShareAlike 4.0 International](https://creativecommons.org/licenses/by-sa/4.0/). Changes may have been made.