# Device control register

> Mediated Wiki article. Canonical URL: https://mediated.wiki/source/Device_control_register
> Markdown URL: https://mediated.wiki/source/Device_control_register.md
> Source: https://en.wikipedia.org/wiki/Device_control_register
> Source revision: 1295211791
> License: Creative Commons Attribution-ShareAlike 4.0 International (https://creativecommons.org/licenses/by-sa/4.0/)

{{More categories|date=February 2025}}

In [computing](/source/computing), a '''device [control register](/source/control_register)''' is a [hardware register](/source/hardware_register) that controls some [computer hardware](/source/computer_hardware) device, for example a [peripheral](/source/peripheral) or an [expansion card](/source/expansion_card).

Specific technologies use this terminology with a narrower meaning:
* The [ISA PNP](/source/ISA_PNP) specification divides the registers of a device in two categories: control registers and configuration registers. One of the device control registers defined by ISA PNP is (for example) the Activate register, which turns the card on or off.<ref name="Shanley1995">{{cite book|author=Tom Shanley|title=Plug and Play System Architecture|url=https://books.google.com/books?id=ibLa4I5EnC4C&pg=PA156|year=1995|publisher=Addison-Wesley Professional|isbn=978-0-201-41013-6|page=156}}</ref>
* The Device Control Register is also the name of a specific register in the [PCI Express](/source/PCI_Express) architecture. It has fields that (among other things) control what is the maximum read request size (in bytes) that the device can make.<ref name="Budruk2004">{{cite book|author=Ravi Budruk|title=PCI Express System Architecture|year=2004|publisher=Addison-Wesley Professional|isbn=978-0-321-15630-3|page=906}}</ref>
* [Device Control Register](/source/CoreConnect) (DCR) is also the name of an IBM proprietary [bus](/source/Bus_(computing)). Its stated design goal is to "transfer data between a DCR master, typically a CPU’s general purpose registers, and the DCR slave logic’s device control registers".<ref>[http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/2F9323ECBC8CFEE0872570F4005C5739/$file/DcrBus.pdf Device Control Register Bus 3.5 Architecture Specifications]</ref> For example, the IBM [MultiProcessor Interrupt Controller](/source/MultiProcessor_Interrupt_Controller) (MPIC) is connected up to four processors via a shared DCR bus, and in turn the MPIC handles up to 128 [interrupt](/source/interrupt) sources.<ref>IBM [https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/F27971551C9EED8E8525774A0048770A/$file/mpic_db_05_16_2011.pdf Multiprocessor Interrupt Controller. Data Book]</ref>

== References ==
{{reflist}}

Category:Computing terminology
Category:Digital registers

---
Adapted from the Wikipedia article [Device control register](https://en.wikipedia.org/wiki/Device_control_register) by Wikipedia contributors ([contributor history](https://en.wikipedia.org/wiki/Device_control_register?action=history)). Available under [Creative Commons Attribution-ShareAlike 4.0 International](https://creativecommons.org/licenses/by-sa/4.0/). Changes may have been made.
