# Cache invalidation

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Process in a computer system where entries in a cache are replaced or removed

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**Cache invalidation** is a process in a [computer system](/source/Computer_system) whereby entries in a [cache](/source/Cache_(computing)) are replaced or removed.

It can be done explicitly, as part of a [cache coherence](/source/Cache_coherence) protocol. In such a case, a processor changes a memory location and then invalidates the cached [values](/source/Value_(computer_science)) of that memory location across the rest of the computer system.

## Explicit invalidation

*Cache invalidation* can be used to [push](/source/Push_technology) new content to a [client](/source/Client_(computing)). This method functions as an alternative to other methods of displaying new content to connected clients. *Invalidation* is carried out by changing the application data, which in turn marks the information received by the client as out-of-date. After the cache is invalidated, if the client requests the cache, they are delivered a new version.[1]

### Methods

There are three specific methods to invalidate a cache, but not all [caching proxies](/source/Caching_proxy) support these methods.

#### Purge

Removes content from caching proxy immediately. When the client requests the data again, it is [fetched](/source/Instruction_cycle) from the application and stored in the caching proxy. This method removes all variants of the cached content.[1]

#### Refresh

Fetches requested content from the application, even if cached content is available. The content previously stored in the cache is replaced with a new version from the application. This method affects only one variant of the cached content.[1]

#### Ban

A reference to the cached content is added to a [blacklist](/source/Blacklist_(computing)) (or ban list). Client requests are then checked against this blacklist, and if a request matches, new content is fetched from the application, returned to the client, and added to the cache.[1]

This method, unlike purge, does not immediately remove cached content from the caching proxy. Instead, the cached content is updated after a client requests that specific information.

### Alternatives

There are a few alternatives to cache invalidation that still deliver updated content to the client. One alternative is to expire the cached content quickly by reducing the [time-to-live (TTL)](/source/Time_to_live) to a very low value. Another alternative is to validate the cached content at each request. A third option is to not cache volatile content requested by the client. These alternatives can cause issues, as they create high load on the application due to more frequent requests for information.[1]

### Disadvantages

Using invalidation to transfer new content can be difficult when invalidating multiple objects. Invalidating multiple representations adds a level of complexity to the application. Cache invalidation must be carried out through a caching proxy; these requests can impact performance of the caching proxy, causing information to be transferred at a slower rate to clients.[1]

## References

1. ^ [***a***](#cite_ref-:0_1-0) [***b***](#cite_ref-:0_1-1) [***c***](#cite_ref-:0_1-2) [***d***](#cite_ref-:0_1-3) [***e***](#cite_ref-:0_1-4) [***f***](#cite_ref-:0_1-5) ["An Introduction to Cache Invalidation — FOSHttpCache Documentation"](http://foshttpcache.readthedocs.org/en/stable/invalidation-introduction.html). *foshttpcache.readthedocs.org*. Retrieved 2016-01-02.

v t e Parallel computing General Distributed computing Parallel computing Parallel algorithm Massively parallel Cloud computing High-performance computing Multiprocessing Manycore processor GPGPU Computer network Systolic array Levels Bit Instruction Thread Task Data Memory Loop Pipeline Multithreading Temporal Simultaneous (SMT) Simultaneous and heterogenous Speculative (SpMT) Preemptive Cooperative Clustered multi-thread (CMT) Hardware scout Theory PRAM model PEM model Analysis of parallel algorithms Amdahl's law Gustafson's law Cost efficiency Karp–Flatt metric Slowdown Speedup Elements Process Thread Fiber Instruction window Array Coordination Multiprocessing Memory coherence Cache coherence Cache invalidation Barrier Synchronization Application checkpointing Programming Stream processing Dataflow programming Models Implicit parallelism Explicit parallelism Concurrency Non-blocking algorithm Hardware Flynn's taxonomy SISD SIMD Array processing (SIMT) Pipelined processing Associative processing MISD MIMD Dataflow architecture Pipelined processor Superscalar processor Vector processor Multiprocessor symmetric asymmetric Memory shared distributed distributed shared UMA NUMA COMA Massively parallel computer Computer cluster Beowulf cluster Grid computer Hardware acceleration APIs Ateji PX Boost Chapel HPX Charm++ Cilk Coarray Fortran CUDA Dryad C++ AMP Global Arrays GPUOpen MPI OpenMP OpenCL OpenHMPP OpenACC Parallel Extensions PVM pthreads RaftLib ROCm UPC TBB ZPL Problems Automatic parallelization Cache stampede Deadlock Deterministic algorithm Embarrassingly parallel Parallel slowdown Race condition Software lockout Scalability Starvation Category: Parallel computing

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Adapted from the Wikipedia article [Cache invalidation](https://en.wikipedia.org/wiki/Cache_invalidation) by Wikipedia contributors ([contributor history](https://en.wikipedia.org/wiki/Cache_invalidation?action=history)). Available under [Creative Commons Attribution-ShareAlike 4.0 International](https://creativecommons.org/licenses/by-sa/4.0/). Changes may have been made.
